A module having first and second memory devices and a termination component. A first
signal line is coupled to the first memory device to provide first data thereto, the first data to …

US8359445B2 - Method and apparatus for signaling between devices of a memory system -
Google Patents US8359445B2 - Method and apparatus for signaling between devices of a …

An interface alignment pattern for de-skewing data bits received on an elastic interface is
disclosed. The interface alignment pattern is “busy in that it has a high number of logic state …

(63) Continuation of application No. 107732, 533, filed on T" E al s guy, les Sh 11.."" So ES
3.31....,(74) Attorney, Agent, or Firm Charles Shemwe continuation of application No …

SUMMARY OF THE INVENTION A memory system and method according to various
aspects of the present invention includes a memory and an adaptive timing system for …

A memory system and method according to various aspects of the present invention
comprises a memory and an adaptive timing system for controlling access to the memory …

A memory component has a signaling interface, data input/output (I/O) circuitry,
command/address (CA) circuitry and clock generation circuitry. The signaling interface …

(57) ABSTRACT A memory system having? rst and second memory devices and a
termination component. A? rst signal line is coupled to the? rst memory device to provide …

(57) ABSTRACT A memory component having a first and second interface. The first interface
is provided to sample address information in response to a first clock signal. The first …

(57) ABSTRACT A DRAM controller component generates a timing signal and transmits, to a
DRAM, write data that requires a first time interval to propagate from the DRAM controller …