[HTML][HTML] Wireless sensor network optimization: Multi-objective paradigm

M Iqbal, M Naeem, A Anpalagan, A Ahmed, M Azam - Sensors, 2015 - mdpi.com
Optimization problems relating to wireless sensor network planning, design, deployment
and operation often give rise to multi-objective optimization formulations where multiple …

A review of recent research on heat transfer in three-dimensional integrated circuits (3-D ICs)

SS Salvi, A Jain - IEEE Transactions on Components …, 2021 - ieeexplore.ieee.org
Three-dimensional integrated circuits (3-D IC) technology has emerged in the past few
decades, driven in part by the techno-economic difficulties of dimensional scaling and the …

A novel thermal management scheme for 3D-IC chips with multi-cores and high power density

B Ding, ZH Zhang, L Gong, MH Xu… - Applied thermal …, 2020 - Elsevier
To solve the increasingly serious thermal management problem of chips with multi-cores
and high power density in the three-dimensional integrated circuit (3D-IC), a model of 3D-IC …

3D-ICE: A compact thermal model for early-stage design of liquid-cooled ICs

A Sridhar, A Vincenzi, D Atienza… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
Liquid-cooling using microchannel heat sinks etched on silicon dies is seen as a promising
solution to the rising heat fluxes in two-dimensional and stacked three-dimensional …

Multi-objective optimization in sensor networks: Optimization classification, applications and solution approaches

M Iqbal, M Naeem, A Anpalagan, NN Qadri, M Imran - Computer Networks, 2016 - Elsevier
A number of the practical scenarios relating to sensor networks are modeled as multi-
objective optimization formulations where multiple desirable objectives compete with each …

Security and vulnerability implications of 3D ICs

Y Xie, C Bao, C Serafy, T Lu… - … on Multi-Scale …, 2016 - ieeexplore.ieee.org
Physical limit of transistor miniaturization has driven chip design into the third dimension. 3D
integration technology emerges as a viable option to improve chip performance and …

TSV-based 3-D ICs: Design methods and tools

T Lu, C Serafy, Z Yang, SK Samal… - … on Computer-Aided …, 2017 - ieeexplore.ieee.org
Vertically integrated circuits (3-D ICs) may revitalize Moore's law scaling which has slowed
down in recent years. 3-D stacking is an emerging technology that stacks multiple dies …

Greencool: An energy-efficient liquid cooling design technique for 3-d mpsocs via channel width modulation

MM Sabry, A Sridhar, J Meng… - … on Computer-Aided …, 2013 - ieeexplore.ieee.org
Liquid cooling using interlayer microchannels has appeared as a viable and scalable
packaging technology for 3-D multiprocessor system-on-chips (MPSoCs). Microchannel …

Evaluation of wireless network-on-chip architectures with microchannel-based cooling in 3D multicore chips

MS Shamim, RS Narde… - … Informatics and Systems, 2019 - Elsevier
Abstract Three-dimensional multicore Integrated Circuits (3D ICs) with Network-on-Chip
(NoC) based interconnections provide promising solutions to the challenges of footprint …

Thermal prediction and adaptive control through workload phase detection

R Cochran, S Reda - ACM Transactions on Design Automation of …, 2013 - dl.acm.org
Elevated die temperature is a true limiter to the scalability of modern processors. With
continued technology scaling in order to meet ever-increasing performance demands, it is …