FinFET with bottom SiGe layer in source/drain

MH Yu, PR Jeng, TL Lee - US Patent 8,963,258, 2015 - Google Patents
A FinFET includes a substrate, a fin structure on the substrate, a source in the fin structure, a
drain in the fin structure, a channel in the fin structure between the source and the drain, a …

Oxide-nitride-oxide stack having multiple oxynitride layers

SC Levy, K Ramkumar, F Jenne, SG Geha - US Patent 10,903,068, 2021 - Google Patents
A semiconductor device including an oxide-nitride-oxide (ONO) structure having a multi-
layer charge storing layer and methods of forming the same are provided. Generally, the …

Process for fabricating a field-effect transistor device implemented on a network of vertical nanowires, the resulting transistor device, an electronic device comprising …

G Larrieu - US Patent 9,379,238, 2016 - Google Patents
A process for fabricating a field-effect transistor device (20) implemented on a network of
vertical nanowires (24), includes: producing a source electrode (26) and a drain elec trode …

Radical oxidation process for fabricating a nonvolatile charge trap memory device

K Ramkumar, S Levy, J Byun - US Patent 8,940,645, 2015 - Google Patents
A method for fabricating a nonvolatile charge trap memory device is described. The method
includes subjecting a substrate to a first oxidation process to form a tunnel oxide layer …

Memory transistor with multiple charge storing layers and a high work function gate electrode

I Polishchuk, S Levy, K Ramkumar - US Patent 8,633,537, 2014 - Google Patents
A semiconductor devices including non-volatile memories and methods of fabricating the
same to improve performance thereof are provided. Generally, the device includes a …

Non-Volatile Memory Device and Method of Forming the Same

X Li, N Singh, Z Chen, XP Wang… - US Patent App. 13 …, 2013 - Google Patents
Assignee: Agency for Science, Technology and Research, Singapore (SG) According to
embodiments of the present invention, a non (21) Appl. No.: 13/860,870 volatile memory …

Semi-floating gate FET

Q Liu, JH Zhang - US Patent 9,799,776, 2017 - Google Patents
FET built on a silicon substrate, wherein the source, drain, and channel are vertically
aligned, on top of one another. Current flow between the source and the drain is influenced …

Memory transistor with multiple charge storing layers and a high work function gate electrode

I Polishchuk, SC Levy, K Ramkumar - US Patent 9,093,318, 2015 - Google Patents
A memory device is described. Generally, the device includes a memory transistor and a
metal oxide semiconductor (MOS) logic transistor. The memory transistor includes: a …

Integration scheme for non-volatile memory on gate-all-around structure

D Kong, Z Bi, Z Xu, K Cheng - US Patent 10,615,288, 2020 - Google Patents
(57) ABSTRACT A integrated device including a non-volatile memory (NVM) and a
nanosheet field effect transistor (FET) and a method of fabricating the device include …

Oxide-nitride-oxide stack having multiple oxynitride layers

SC Levy, K Ramkumar, FB Jenne, SG Geha - US Patent 9,355,849, 2016 - Google Patents
(57) ABSTRACT A semiconductor device including an oxide-nitride-oxide (ONO) structure
having a multi-layer charge storing layer and methods of forming the same are provided …