Logic design within memristive memories using memristor-aided loGIC (MAGIC)

N Talati, S Gupta, P Mane… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
Realizing logic operations within passive crossbar memory arrays is a promising approach
to enable novel computer architectures, different from conventional von Neumann …

Reconfigurable silicon nanowire transistors

A Heinzig, S Slesazeck, F Kreupl, T Mikolajick… - Nano …, 2012 - ACS Publications
Over the past 30 years electronic applications have been dominated by complementary
metal oxide semiconductor (CMOS) devices. These combine p-and n-type field effect …

FPGA architecture: Survey and challenges

I Kuon, R Tessier, J Rose - Foundations and Trends® in …, 2008 - nowpublishers.com
Abstract Field-Programmable Gate Arrays (FPGAs) have become one of the key digital
circuit implementation media over the last decade. A crucial part of their creation lies in their …

Beyond von Neumann—logic operations in passive crossbar arrays alongside memory operations

E Linn, R Rosezin, S Tappertzhofen, U Böttger… - …, 2012 - iopscience.iop.org
The realization of logic operations within passive crossbar memory arrays is a promising
approach to expand the fields of application of such architectures. Material implication was …

Reconfigurable computing architectures

R Tessier, K Pocek, A DeHon - Proceedings of the IEEE, 2015 - ieeexplore.ieee.org
Reconfigurable architectures can bring unique capabilities to computational tasks. They
offer the performance and energy efficiency of hardware with the flexibility of software. In …

[图书][B] Reconfigurable computing: the theory and practice of FPGA-based computation

S Hauck, A DeHon - 2010 - books.google.com
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …

Memristor based computation-in-memory architecture for data-intensive applications

S Hamdioui, L Xie, HA Du Nguyen… - … , Automation & Test …, 2015 - ieeexplore.ieee.org
One of the most critical challenges for today's and future data-intensive and big-data
problems is data storage and analysis. This paper first highlights some challenges of the …

CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices

DB Strukov, KK Likharev - Nanotechnology, 2005 - iopscience.iop.org
This paper describes a digital logic architecture for'CMOL'hybrid circuits which combine a
semiconductor–transistor (CMOS) stack and two levels of parallel nanowires, with molecular …

3-D nFPGA: A reconfigurable architecture for 3-D CMOS/nanomaterial hybrid digital circuits

C Dong, D Chen, S Haruehanroengra… - IEEE Transactions on …, 2007 - ieeexplore.ieee.org
In this paper, we introduce a novel reconfigurable architecture, named 3D field-
programmable gate array (3D nFPGA), which utilizes 3D integration techniques and new …

[图书][B] System-on-chip test architectures: nanometer design for testability

LT Wang, CE Stroud, NA Touba - 2010 - books.google.com
Modern electronics testing has a legacy of more than 40 years. The introduction of new
technologies, especially nanometer technologies with 90nm or smaller geometry, has …