Low-power designs are getting increased significance in numerous applications like high-
performance computing and wireless communication due to the rise in power dissipation …

This article proposes a compact compressor adder of Vedic multiplication for an area-
efficient FFT architecture. A standard multi-radix-24, 22, 23 FFT with a single-path delay …

Agriculture has always been the largest industry in our country in terms of employment. The
ongoing migration of people from rural to urban regions is hindering agriculture. The Internet …

The process of using electronic circuits to replicate the neurobiological architectures seen in
the nervous system is known as neuromorphic engineering, also referred to as …

Micro-processor designs have become a revolutionary technology almost in every industry.
They brought the reality of automation and also electronic gadgets. While trying to improvise …

The Arithmetic and Logic Unit is a CPU component that performs arithmetic and logical
operations on data. The execution of the multiple instructions in a computer program is …

This paper provides the architecture for high-speed multiplication using one of the Vedic
arithmetic approaches. This strategy is used to increase speed. The compressor-based …

Performance evaluation of adder architectures for Vedic multiplier implementation is
introduced in this article. The purpose is to evaluate and analyze various adder architectures …

In recent years, there has been a trend towards more sophisticated robot control. This has
been driven by advances in artificial intelligence (AI) and machine learning, which have …

A unique strategy for optimum multi-objective optimization for VLSI implementation of
artificial neural network (ANN) is proposed. This strategy is efficient in terms of area, power …