Three dimensional nonvolatile memory cell structure with upper body connection

HS Rhie - US Patent 9,236,394, 2016 - Google Patents
(57) ABSTRACT A three-dimensional integrated circuit non-volatile memory array includes a
memory array of vertical channel NAND flash strings connected between a substrate Source …

Semiconductor memory device and method for manufacturing the same

M Kiyotoshi - US Patent 8,581,330, 2013 - Google Patents
According to one embodiment, a semiconductor memory device includes a stacked body, a
semiconductor pillar, and a plurality of memory cells. The stacked body includes a plurality …

Semiconductor memory device and method for manufacturing same

T Kamigaichi - US Patent 9,917,096, 2018 - Google Patents
According to one embodiment, a semiconductor memory device includes a stacked body
including a plurality of electrode layers and a plurality of inter-layer insulating layers each …

Semiconductor device

S Yamazaki, T Atsumi, E Yuta - US Patent App. 15/159,021, 2016 - Google Patents
(57) ABSTRACT A highly integrated semiconductor device is provided. The semiconductor
device includes a Substrate, a prism-like insulator, a memory cell string including a plurality …

U-shaped common-body type cell string

HS Rhie - US Patent 9,893,084, 2018 - Google Patents
A flash device comprising a well and a U-shaped flash cell string, the U-shaped flash cell
string built directly on a substrate adjacent the well. The U-shaped flash cell string comprises …

Memory device improvement

VR Purayath, P Panda, A Mallick… - US Patent App. 16 …, 2020 - Google Patents
(57) ABSTRACT A method of forming a memory device including a plurality of nonvolatile
memory cells is provided. The method includes forming a hole in a stack of alternating …

Non-volatile memory devices and manufacturing methods thereof

JT Park, YW Park, JD Lee - US Patent 10,115,799, 2018 - Google Patents
There is provided a method of manufacturing a non-volatile memory device including:
alternatively stacking a plurality of insulating layers and a plurality of conductive layers on a …

Semiconductor device including a first core pattern under a second core pattern

B Kim, B Kim, JG Jee, JG Kim, JY Ahn… - US Patent …, 2015 - Google Patents
According to example embodiments, a semiconductor device includes horizontal patterns
stacked on a substrate. The horizontal patterns define an opening through the horizontal …

Semiconductor memory device and method of operating the same

H Huh - US Patent App. 13/602,088, 2013 - Google Patents
A semiconductor memory device includes a memory string including memory cells formed
by word lines covering a vertical semiconductor layer on a semiconductor substrate at …

Integrated memory having non-ohmic devices and capacitors

P Sharma, M Balakrishnan - US Patent 11,043,497, 2021 - Google Patents
Some embodiments include a memory cell having a non-ohmic device between a transistor
source/drain region and a capacitor. Some embodiments include a memory cell having a …