FPGA implementation of reconfigurable CORDIC algorithm and a memristive chaotic system with transcendental nonlinearities

SM Mohamed, WS Sayed… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Coordinate Rotation Digital Computer (CORDIC) is a robust iterative algorithm that
computes many transcendental mathematical functions. This paper proposes a …

Adaptive FIR filter design with approximate adder and hybridized multiplier for efficient noise eradication in sensor nodes

S Immareddy, A Sundaramoorthy… - ECS Journal of Solid …, 2023 - iopscience.iop.org
Abstract Finite Impulse Response (FIR) filter contributes a major role in most of the signal
processing applications. However, the Finite Impulse Response filter performance is …

Design of enterprise management system based on edge computing architecture

Y Yang, Z Mei, B Zheng, S Qiu - Mobile Information Systems, 2021 - Wiley Online Library
In the current enterprise management system, the coupling relationship between enterprise
management and operation and maintenance database is not considered, which leads to …

Energy efficient enhanced all pass transformation fostered variable digital filter design based on approximate adder and approximate multiplier for eradicating sensor …

MR Raja, R Naveen, CAD Durai, M Usman… - … Integrated Circuits and …, 2024 - Springer
Variable digital filter (VDF) plays a significant role in communication and signal processing
field. Any prototype filter's preferred frequency response is attained by creating All Pass …

Distributed arithmetic-FIR filter design using Approximate Karatsuba Multiplier and VLCSA

SSH Krishnan, K Vidhya - Expert Systems with Applications, 2024 - Elsevier
In this manuscript, a High Throughput and Low Latency DA-FIR filter design is integrated
with Approximate Karatsuba Multiplier (AKM) and Variable Latency Carry Skip Adder …

[HTML][HTML] High performance and resource efficient FFT processor based on CORDIC algorithm

Y Zhao, H Lv, J Li, L Zhu - EURASIP Journal on Advances in Signal …, 2022 - Springer
Abstract Fast Fourier Transform is widely used in communication and signal processing. I
propose an improved multipath delay commutator pipelining architecture based on the radix …

Energy-efficient architecture for high-performance FIR adaptive filter using hybridizing CSDTCSE-CRABRA based distributed arithmetic design: Noise removal …

RD Kulkarni, MA Majid - Integration, 2024 - Elsevier
An energy-efficient architecture of high-performance FIR adaptive filter design using
approximate distributed arithmetic (DA), which is integrated with canonic signed digit-based …

[PDF][PDF] Predictive Power Control Circuit Model With T-DET-FF for Hybrid Pulsed Latch Implementation.

SC Inguva, BM Devi, A Bujunuru, R Shashikala… - Journal of Engineering …, 2023 - jestr.org
Pulsed Latches circuits are one important aspects of the reduction of power for each read
and write operations in memories. As the design complexity with reduction of nanometers …

Implementación y evaluación de la eficiencia del algoritmo cordic en cy fpga mediante vhdl

LG Enríquez-Pérez… - … Ciencias Básicas e …, 2023 - repository.uaeh.edu.mx
El enfoque de la tecnología hacia la mejora del hardware dejando de lado la optimización
del software es más notorio día con día. Este proyecto busca encontrar una forma eficiente …

[引用][C] Efficient Hardware Architecture Design of Radix-22 Fast Fourier Transform Using Coordinate Rotation Digital Computer

K Das, SN Pradhan, A Bhattacharjee - Journal of Circuits, Systems …, 2024 - World Scientific
The fast Fourier transform (FFT) is a widely used algorithm for computing the discrete Fourier
transform (DFT) in real-time signal processing. Achieving high performance with minimal …