Comparison and extension of approximate 4-2 compressors for low-power approximate multipliers

AGM Strollo, E Napoli, D De Caro… - … on Circuits and …, 2020 - ieeexplore.ieee.org
Approximate multipliers attract a large interest in the scientific literature that proposes
several circuits built with approximate 4-2 compressors. Due to the large number of …

A survey on approximate multiplier designs for energy efficiency: From algorithms to circuits

Y Wu, C Chen, W Xiao, X Wang, C Wen, J Han… - ACM Transactions on …, 2024 - dl.acm.org
Given the stringent requirements of energy efficiency for Internet-of-Things edge devices,
approximate multipliers, as a basic component of many processors and accelerators, have …

Approximate multipliers based on new approximate compressors

D Esposito, AGM Strollo, E Napoli… - … on Circuits and …, 2018 - ieeexplore.ieee.org
Approximate computing is an emerging trend in digital design that trades off the requirement
of exact computation for improved speed and power performance. This paper proposes …

Energy and area efficient imprecise compressors for approximate multiplication at nanoscale

M Ahmadinejad, MH Moaiyeri, F Sabetzadeh - AEU-International Journal of …, 2019 - Elsevier
Approximate computing is a new paradigm for designing energy-efficient integrated circuits
at the nanoscale. In this paper, we propose efficient imprecise 4: 2 and 5: 2 compressors by …

Design and implementation of 32-bit adders using various full adders

KAK Maurya, YR Lakshmanna… - 2017 Innovations in …, 2017 - ieeexplore.ieee.org
Adders play a vital role in the digital signal processing systems. The design of 32-bit adders
is of high importance because 32-bit architecture is common and widely used in many digital …

Design and analysis of multiplier using approximate 15-4 compressor

R Marimuthu, YE Rezinold, PS Mallick - IEEE Access, 2016 - ieeexplore.ieee.org
This paper presents the design of approximate 15-4 compressor using 5-3 compressors as
basic module. Four different types of approximate 5-3 compressors are used in a 15-4 …

On the design of logarithmic multiplier using radix-4 booth encoding

R Pilipović, P Bulić - IEEE access, 2020 - ieeexplore.ieee.org
This paper proposes an energy-efficient approximate multiplier which combines radix-4
Booth encoding and logarithmic product approximation. Additionally, a datapath pruning …

Fast binary counters based on symmetric stacking

C Fritz, AT Fam - IEEE Transactions on Very Large Scale …, 2017 - ieeexplore.ieee.org
In this brief, a new binary counter design is proposed. It uses 3-bit stacking circuits, which
group all of the “1” bits together, followed by a novel symmetric method to combine pairs of 3 …

High speed speculative multipliers based on speculative carry-save tree

A Cilardo, D De Caro, N Petra, F Caserta… - … on Circuits and …, 2014 - ieeexplore.ieee.org
This paper proposes a novel approach to build integer multiplication circuits based on
speculation, a technique which performs a faster-but occasionally wrong-operation resorting …

A high speed and area efficient Booth recoded Wallace tree multiplier for fast arithmetic circuits

MJ Rao, S Dubey - 2012 Asia Pacific conference on …, 2012 - ieeexplore.ieee.org
A Wallace tree multiplier using Booth Recoder is proposed in this paper. It is an improved
version of tree based Wallace tree multiplier architecture. This paper aims at additional …