A survey of circuit-level soft error mitigation methodologies

S Sayil - Analog Integrated Circuits and Signal Processing, 2019 - Springer
Soft errors created due to propagation of single event transients are a significant reliability
challenge in modern VLSI. With advances in CMOS technology scaling, circuits become …

Analog programmable neuron and case study on VLSI implementation of Multi-Layer Perceptron (MLP)

M Heidari, H Shamsi - Microelectronics Journal, 2019 - Elsevier
In this work, a programmable neuron is proposed to approximate the following activation
functions: sigmoid, hyperbolic tangent and linear. In other words, the neural network …

Energy-efficient and reliable inference in nonvolatile memory under extreme operating conditions

S Resch, SK Khatamifard, ZI Chowdhury… - ACM Transactions on …, 2022 - dl.acm.org
Beyond-edge devices can operate outside the reach of the power grid and without batteries.
Such devices can be deployed in large numbers in regions that are difficult to access. Using …

Soft error reliability improvement of digital circuits by exploiting a fast gate sizing scheme

M Raji, MA Sabet, B Ghavami - IEEE Access, 2019 - ieeexplore.ieee.org
Due to the reduction in device feature size and supply voltage, achieving soft error reliability
in sub-micrometer digital circuits is becoming extremely challenging. We consider the …

Optimal soft error mitigation in wireless communication using approximate logic circuits

JH Anajemba, JA Ansere, F Sam, C Iwendi… - … Informatics and Systems, 2021 - Elsevier
The development of in chip manufacturing processes has enhanced energy-efficient nano-
electronic and high-performance devices in daily activities. In recent times, CMOS …

Single event transient (SET) mitigation circuits with immune leaf nodes

FM Sajjade, NK Goyal… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
In a spacecraft, flip-flops take part in holding operational configuration for long durations.
Single event transients (SETs) at control inputs of such flip-flops can culminate in single …

Simulations of threshold logic unit problems using memristor based synapses and CMOS neuron

A Chowdhury, A Ayman, S Dey… - 2017 3rd International …, 2017 - ieeexplore.ieee.org
This paper presents an implementation of Threshold Logic Units (TLU), the special case of
an Artificial Neural Network (ANN), using discrete circuit elements like memristors as …

The analysis of soft error in static random access memory and mitigation by using transmission gate

FMA Kadir, N Julai - Bulletin of Electrical Engineering and Informatics, 2024 - beei.org
As the progress of technology continues in accordance to Moore's law, the density and
downsizing of circuitry presents a significant vulnerability to the effects of soft errors. This …

In-Circuit Mitigation Approach of Single Event Transients for 45nm Flip-Flops

S Azimi, C De Sio, L Sterpone - … on On-Line Testing and Robust …, 2020 - ieeexplore.ieee.org
Nowadays, radiation-induced Single Event Transients are a leading cause of critical errors
in CMOS nanometric integrated circuits. In this work, we propose a workflow for analyzing …

Analysis of radiation impact on memristive crossbar arrays

MA Zaman, R Joshi, S Katkoori - 2020 IEEE 11th Latin …, 2020 - ieeexplore.ieee.org
Memristive crossbar architecture with high device density is the most preferred structure to
realize memristor based in-memory computing system. Typically, synthesized gate-level …