Microarchitecture of a high radix router

J Kim, WJ Dally, B Towles… - … Symposium on Computer …, 2005 - ieeexplore.ieee.org
Evolving semiconductor and circuit technology has greatly increased the pin bandwidth
available to a router chip. In the early 90s, routers were limited to 10Gb/s of pin bandwidth …

Practical algorithms for performance guarantees in buffered crossbars

ST Chuang, S Iyer, N McKeown - Proceedings IEEE 24th …, 2005 - ieeexplore.ieee.org
This paper is about high capacity switches and routers that give guaranteed throughput, rate
and delay guarantees. Many routers are built using input queueing or combined input and …

An evolution to crossbar switches with virtual output queuing and buffered cross points

K Yoshigoe, KJ Christensen - IEEE network, 2003 - ieeexplore.ieee.org
Input queued (IQ) switch architectures with virtual output queues (VOQ) scale up to very high
speeds and have been a subject of intense research in the past decade. VOQ IQ switches …

Output-queued switch emulation by fabrics with limited memory

RB Magill, CE Rohrs… - IEEE Journal on Selected …, 2003 - ieeexplore.ieee.org
The output-queued (OQ) switch is often considered an ideal packet switching architecture for
providing quality-of-service guarantees. Unfortunately, the high-speed memory …

Variable packet size buffered crossbar (CICQ) switches

M Katevenis, G Passas, D Simos… - … (IEEE Cat. No …, 2004 - ieeexplore.ieee.org
One of the most widely used architectures for packet switches is the crossbar. A special
version of it is the buffered crossbar, where small buffers are associated with the crosspoints; …

[PDF][PDF] Error Sensitivity of the Linux Kernel Executing on PowerPC G4 and Pentium 4 Processors.

W Gu, Z Kalbarczyk, RK Iyer - DSN, 2004 - researchgate.net
The goals of this study are:(i) to compare Linux kernel (2.4. 22) behavior under a broad
range of errors on two target processors—the Intel Pentium 4 (P4) running RedHat Linux 9.0 …

The crosspoint-queued switch

Y Kanizo, D Hay, I Keslassy - IEEE INFOCOM 2009, 2009 - ieeexplore.ieee.org
This paper calls for rethinking packet-switch architectures by cutting all dependencies
between the switch fabric and the linecards. Most single-stage packet-switch architectures …

Design of intelligent internet of things for equipment maintenance

X Xiaoli, Z Yunbo, W Guoxin - 2011 Fourth International …, 2011 - ieeexplore.ieee.org
In order to strengthen the security guarantee and improve the scientific management level of
important equipments, the intelligent internet of things for equipment maintenance (IITEM) …

[PDF][PDF] Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics.

N Chrysos, M Katevenis - INFOCOM, 2006 - researchgate.net
Three-stage non-blocking switching fabrics are the next step in scaling current crossbar
switches to many hundreds or few thousands of ports. Congestion management, however, is …

[图书][B] Interconnections for Computer Communications and Packet Networks

R Rojas-Cessa - 2016 - taylorfrancis.com
This book introduces different interconnection networks applied to different systems.
Interconnection networks are used to communicate processing units in a multi-processor …