Exploratory and live, programming and coding: A literature study comparing perspectives on liveness

P Rein, S Ramson, J Lincke, R Hirschfeld… - arXiv preprint arXiv …, 2018 - arxiv.org
Various programming tools, languages, and environments give programmers the impression
of changing a program while it is running. This experience of liveness has been discussed …

Language-directed hardware design for network performance monitoring

S Narayana, A Sivaraman, V Nathan, P Goyal… - Proceedings of the …, 2017 - dl.acm.org
Network performance monitoring today is restricted by existing switch support for
measurement, forcing operators to rely heavily on endpoints with poor visibility into the …

[图书][B] Computer architecture: a quantitative approach

JL Hennessy, DA Patterson - 2017 - books.google.com
Computer Architecture: A Quantitative Approach, Sixth Edition has been considered
essential reading by instructors, students and practitioners of computer design for over 20 …

[PDF][PDF] The RISC-V instruction set manual, volume I: User-level ISA, version 2.0

A Waterman, Y Lee… - … Berkeley, Tech. Rep …, 2014 - digitalassets.lib.berkeley.edu
This is version 2.1 of the document describing the RISC-V user-level architecture. Note the
frozen user-level ISA base and extensions IMAFDQ version 2.0 have not changed from the …

A material history of bits

JF Blanchette - Journal of the American Society for Information …, 2011 - Wiley Online Library
In both the popular press and scholarly research, digital information is persistently discussed
in terms that imply its immateriality. In this characterization, the digital derives its power from …

Generation scavenging: A non-disruptive high performance storage reclamation algorithm

D Ungar - ACM Sigplan notices, 1984 - dl.acm.org
Many interactive computing environments provide automatic storage reclamation and virtual
memory to ease the burden of managing storage. Unfortunately, many storage reclamation …

Optimizing dynamically-typed object-oriented languages with polymorphic inline caches

U Hölzle, C Chambers, D Ungar - … : Geneva, Switzerland, July 15–19, 1991 …, 1991 - Springer
Polymorphic inline caches (PICs) provide a new way to reduce the overhead of polymorphic
message sends by extending inline caches to include more than one cached lookup result …

The magic VLSI layout system

JK Ousterhout, GT Hamachi, RN Mayo… - IEEE Design & Test …, 1985 - ieeexplore.ieee.org
Magic is a new IC layout system that includes several facilities traditionally contained in
separate batch-processing programs. Magic incorporates expertise about design rules …

[图书][B] Adaptive optimization for SELF: reconciling high performance with exploratory programming

U Holzle - 1994 - search.proquest.com
Crossing abstraction boundaries often incurs a substantial run-time overhead in the form of
frequent procedure calls. Thus, pervasive use of abstraction, while desirable from a design …

VLSI processor architecture

Hennessy - IEEE Transactions on Computers, 1984 - ieeexplore.ieee.org
A processor architecture attempts to compromise between the needs of programs hosted on
the architecture and the performance attainable in implementing the architecture. The needs …