Automating the application data placement in hybrid memory systems
Multi-tiered memory systems, such as those based on Intel® Xeon Phi™ processors, are
equipped with several memory tiers with different characteristics including, among others …
equipped with several memory tiers with different characteristics including, among others …
ComDetective: a lightweight communication detection tool for threads
Inter-thread communication is a vital performance indicator in shared-memory systems. Prior
works on identifying inter-thread communication employed hardware simulators or binary …
works on identifying inter-thread communication employed hardware simulators or binary …
Phase-based data placement scheme for heterogeneous memory systems
Heterogeneous memory systems are equipped with two or more types of memories, which
work in tandem to complement the capabilities of each other. The multiple memories can …
work in tandem to complement the capabilities of each other. The multiple memories can …
Rapid memory footprint access diagnostics
Footprint and reuse distance measure temporal locality and therefore do not capture the
significance of access patterns (spacial locality). A strided access pattern has the largest …
significance of access patterns (spacial locality). A strided access pattern has the largest …
Object placement for high bandwidth memory augmented with high capacity memory
High bandwidth memory (HBM) is a new emerging technology that aims to improve the
performance of bandwidth limited applications. Even though it provides high bandwidth, it …
performance of bandwidth limited applications. Even though it provides high bandwidth, it …
Performance evaluation of scale-free graph algorithms in low latency non-volatile memory
M Shantharam, K Iwabuchi, P Cicotti… - 2017 IEEE …, 2017 - ieeexplore.ieee.org
The purpose of this study is to quantitatively assess the performance of graph processing
algorithms for large scale-free graphs residing in byte-addressable Non-Volatile Memory …
algorithms for large scale-free graphs residing in byte-addressable Non-Volatile Memory …
Understanding memory access patterns using the BSC performance tools
The growing gap between processor and memory speeds has lead to complex memory
hierarchies as processors evolve to mitigate such divergence by exploiting the locality of …
hierarchies as processors evolve to mitigate such divergence by exploiting the locality of …
Data movement in data-intensive high performance computing
The cost of executing a floating point operation has been decreasing for decades at a much
higher rate than that of moving data. Bandwidth and latency, two key metrics that determine …
higher rate than that of moving data. Bandwidth and latency, two key metrics that determine …
Porting tissue-scale cardiac simulations to the Knights Landing platform
J Langguth, C Jarvis, X Cai - International Conference on High …, 2017 - Springer
To study the performance difference between the two generations of Xeon Phi, as well as
the respective programming techniques, we port and optimize a simulation code for 3D …
the respective programming techniques, we port and optimize a simulation code for 3D …
Access pattern-aware data placement for hybrid dram/nvm
DU Erten - Turkish Journal of Electrical Engineering and …, 2017 - journals.tubitak.gov.tr
In recent years, increased interest in data-centric applications has led to an increasing
demand for large-capacity memory systems. Nonvolatile memory (NVM) technologies …
demand for large-capacity memory systems. Nonvolatile memory (NVM) technologies …