In CMOS circuits, the reduction of the threshold voltage due to voltage scaling leads to
increase in subthreshold leakage current and hence static power dissipation. We propose a …

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for
analysis, characterization, estimation, and optimization of the various forms of power …

Power gating is a technique commonly used for leakage reduction in integrated circuits. In
microprocessors, power gating is implemented by using sleep transistors to selectively …

Relational database management systems (RDMBSs) today are the predominant
technology for storing. In the past few years, the” one size fits all “-thinking concerning …

Low leakage power datapaths can be synthesized using multithreshold CMOS (MTCMOS)
modules. MTCMOS modules can be turned ON or OFF, using sleep signals. The controller in …

The paper describes the design and implementation of an 8/spl times/8 2D DCT chip for use
in low-power applications. The design exploits a coefficient distributed arithmetic (CoDA) …

One of the biggest challenges that programmable devices like FPGAs are facing in ultra
deep sub-micron regime is the exponential rise in leakage power consumption. As …

The most research on the power consumption of circuits has been concentrated on the
switching power and the power dissipated by the leakage current has been relatively minor …

Dual supply voltage design is widely accepted as an effective way to reduce the power
consumption of CMOS circuits. In this paper, we propose a comprehensive design …

Energy reduction of functional units (FUs) is a very important concern for high-end
superscalar processors, not only because FUs consume a significant portion of processor …