Optimization strategies for GPUs: an overview of architectural approaches

A Masola, N Capodieci - International Journal of Parallel, Emergent …, 2023 - Taylor & Francis
Modern Cyber Physical Systems (CPS) applications require hardware capable of optimized
performance-per-watt efficency. This is usually obtained through massively parallel …

Mempol: policing core memory bandwidth from outside of the cores

A Zuepke, A Bastoni, W Chen… - 2023 IEEE 29th Real …, 2023 - ieeexplore.ieee.org
In today's multiprocessor systems-on-a-chip (MP-SoC), the shared memory subsystem is a
known source of temporal interference. The problem causes logically independent cores to …

A real-time virtio-based framework for predictable inter-VM communication

G Schwäricke, R Tabish, R Pellizzoni… - 2021 IEEE Real …, 2021 - ieeexplore.ieee.org
Ensuring real-time properties on current heterogeneous multiprocessor systems on a chip is
a challenging task. Furthermore, online artificial intelligent applications–which are routinely …

Bandwatch: A system-wide memory bandwidth regulation system for heterogeneous multicore

E Seals, M Bechtel, H Yun - 2023 IEEE 29th International …, 2023 - ieeexplore.ieee.org
Unpredictable variation in execution times due to contention in shared hardware resources
in integrated CPU-GPU multicore platforms remains a major challenge for safety-critical real …

Machine Learning Techniques for Understanding and Predicting Memory Interference in CPU-GPU Embedded Systems

A Masola, N Capodieci, B Rouxel… - 2023 IEEE 29th …, 2023 - ieeexplore.ieee.org
Nowadays, heterogeneous embedded platforms are extensively used in various low-latency
applications, including the automotive industry, real-time IoT systems, and automated …

Denial-of-service attacks on shared resources in intel's integrated cpu-gpu platforms

M Bechtel, H Yun - … IEEE 25th International Symposium On Real …, 2022 - ieeexplore.ieee.org
In this paper, we study the effectiveness of denial-of-service (DoS) attacks on Intel's
heterogeneous multicore system-on-chips with integrated GPU (iGPU) in which the last level …

[HTML][HTML] GPU implementation of the Frenet Path Planner for embedded autonomous systems: A case study in the F1tenth scenario

F Muzzini, N Capodieci, F Ramanzin… - Journal of Systems …, 2024 - Elsevier
Autonomous vehicles are increasingly utilized in safety-critical and time-sensitive settings
like urban environments and competitive racing. Planning maneuvers ahead is pivotal in …

Understanding and mitigating memory interference in FPGA-based HeSoCs

G Brilli, A Capotondi, P Burgio… - … Design, Automation & …, 2022 - ieeexplore.ieee.org
Like most high-end embedded systems, FPGA-based systems-on-chip (SoC) are
increasingly adopting heterogeneous designs, where CPU cores, the configurable logic and …

MemPol: polling-based microsecond-scale per-core memory bandwidth regulation

A Zuepke, A Bastoni, W Chen, M Caccamo… - Real-Time …, 2024 - Springer
In today's multiprocessor systems-on-a-chip, the shared memory subsystem is a known
source of temporal interference. The problem causes logically independent cores to affect …

Brief announcement: Optimized gpu-accelerated feature extraction for orb-slam systems

F Muzzini, N Capodieci, R Cavicchioli… - Proceedings of the 35th …, 2023 - dl.acm.org
Reducing the execution time of ORB-SLAM algorithm is a crucial aspect of autonomous
vehicles since it is computationally intensive for embedded boards. We propose a parallel …