Design of high stability and low power 7T SRAM cell in 32-NM CNTFET technology
M Elangovan, M Muthukrishnan - Journal of Circuits, Systems and …, 2022 - World Scientific
A novel 7T carbon nanotube field effect transistor (CNTFET)-based static random-access
memory (SRAM) cell is proposed in this paper. Power and noise margin performances of the …
memory (SRAM) cell is proposed in this paper. Power and noise margin performances of the …
A new low-power full-adder cell for low voltage using CNTFETs
KS Jitendra, A Srinivasulu… - 2017 9th International …, 2017 - ieeexplore.ieee.org
One of the most crucial components in the computing devices is the full adders. The
efficiency and effectiveness of arrays of full adders is essential; thus making it sensible to put …
efficiency and effectiveness of arrays of full adders is essential; thus making it sensible to put …
Read Improved and Low Leakage Power CNTFET Based Hybrid 10t SRAM Cell for Low Power Applications
Static random access memory (SRAM) cell design has undergone extensive development to
achieve good performance and low power consumption. This paper introduces an SRAM …
achieve good performance and low power consumption. This paper introduces an SRAM …
PDP analysis of CNTFET full adders for single and multiple threshold voltages
M Elangovan, R Ranjith, S Devika - Advances in VLSI, Communication …, 2020 - Springer
Adder is a basic building block of the arithmetic logic unit (ALU). Designing of optimized
adder circuit inherently makes a pavement for obtaining optimized ALU design. The …
adder circuit inherently makes a pavement for obtaining optimized ALU design. The …
[PDF][PDF] Energy Efficient CNTFET Based Full Adder Using Hybrid Logic
Full Adder is the basic element for arithmetic operations used in Very Large Scale Integrated
(VLSI) circuits, therefore, optimization of 1-bit full adder cell improves the overall …
(VLSI) circuits, therefore, optimization of 1-bit full adder cell improves the overall …
Analysis on high-performance full adders
K Kavya, B Penumuchi, D Nandan - … Proceedings of ICCET 2020, Volume 2, 2021 - Springer
This paper contains the performance analysis of various available designs of full adders. It is
observed that the full adder is designed for 1 bit, and later it is extended for 32 bits also. The …
observed that the full adder is designed for 1 bit, and later it is extended for 32 bits also. The …
[PDF][PDF] Analysis of FinFET and CNTFET based Hybrid CMOS Full Adder Circuit
H Gehlot, MEA Lodhi - 2022 - academia.edu
In the world of IC, the technology scales down to 32nm or below and CMOS has lost its
recommendation during scaling beyond 32nm due to high power consumption and high …
recommendation during scaling beyond 32nm due to high power consumption and high …