The next generation of computer system designers will be less concerned about details of
processors and memories, and more concerned about the elements of a system tailored to …

Memory is an essential element of every VLSI circuit. This paper reviews Content
Addressable Memory (CAM) and its conventional architectures. A model of CAM is proposed …

Motivated by the necessity to consider probabilistic approaches to future designs, the main
objective of this thesis was to develop and characterize energy efficient probabilistic CMOS …

Nanoscale technologies provide both challenges and opportunities. We show that the
issues and potential solutions facing designers are technology independent and arise …

This paper presents the concept of a new field effect transistor based on ferroelectric
insulator. The proposed design is named Partially Depleted Silicon-on-Ferroelectric …

Design of irredundant and fully testable non-scan synchronous sequential circuits is a major
concern of logic synthesis. The presence of sequentially redundant faults (SRFs) makes test …

This paper presents the concept of a new field effect transistor (FET) named a Partially
Depleted Silicon-on-Ferroelectric Insulator Field Effect Transistor (PD-SOFFET). Our design …

Both asynchronous and reconfigurable techniques are likely to become increasingly
important in the future due to greater device unreliability and variability at nano-scale …

1. Побољшање тачности модела за процену динамичке потрошње логичке структуре
бинарног множача. Побољшање је остварено увођењем новог модела сигнала (ТВТ …

Током протеклих деценија усавршавање технолошког процеса производње CMOS
интегрисаних кола незадрживо се одвијало. Према чувеном Муровом закону, темпо …