Field programmable gate array applications—A scientometric review

J Ruiz-Rosero, G Ramirez-Gonzalez, R Khanna - Computation, 2019 - mdpi.com
Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …

Secure hash algorithms and the corresponding FPGA optimization techniques

ZA Al-Odat, M Ali, A Abbas, SU Khan - ACM Computing Surveys (CSUR), 2020 - dl.acm.org
Cryptographic hash functions are widely used primitives with a purpose to ensure the
integrity of data. Hash functions are also utilized in conjunction with digital signatures to …

A novel hardware architecture for enhancing the keccak hash function in fpga devices

A Sideris, T Sanida, M Dasygenis - Information, 2023 - mdpi.com
Hash functions are an essential mechanism in today's world of information security. It is
common practice to utilize them for storing and verifying passwords, developing pseudo …

A new high throughput and area efficient SHA-3 implementation

MM Wong, J Haj-Yahya, S Sau… - … on Circuits and …, 2018 - ieeexplore.ieee.org
High performance and area efficient Secure Hash Algorithm (SHA-3) hardware realization is
investigated and proposed in this work. In addition to the new and simplified round constant …

Comparative study of Keccak SHA-3 implementations

A Dolmeta, M Martina, G Masera - Cryptography, 2023 - mdpi.com
This paper conducts an extensive comparative study of state-of-the-art solutions for
implementing the SHA-3 hash function. SHA-3, a pivotal component in modern …

Lightweight secure-boot architecture for risc-v system-on-chip

J Haj-Yahya, MM Wong, V Pudi… - … on Quality Electronic …, 2019 - ieeexplore.ieee.org
Securing thousands of connected, resource-constrained computing devices is a major
challenge nowadays. Adding to the challenge, third party service providers need regular …

Efficient FPGA implementation of the SHA-3 hash function

M Sundal, R Chaves - 2017 IEEE Computer Society Annual …, 2017 - ieeexplore.ieee.org
In this paper, three different approaches are considered for FPGA based implementations of
the SHA-3 hash functions. While the performance of proposed unfolded and pipelined …

Quick boot of trusted execution environment with hardware accelerators

TT Hoang, C Duran, DT Nguyen-Hoang, DH Le… - IEEE …, 2020 - ieeexplore.ieee.org
The Trusted Execution Environment (TEE) offers a software platform for secure applications.
The TEE offers a memory isolation scheme and software authentication from a high privilege …

High throughput pipelined implementation of the sha-3 cryptoprocessor

A Sideris, T Sanida, M Dasygenis - 2020 32nd International …, 2020 - ieeexplore.ieee.org
Today, in the modern world of digital communications, sensitive information is transmitted
via public networks. It is essential to ensure the privacy of their transmission with …

A complete SHA-3 hardware library based on a high efficiency Keccak design

E Camacho-Ruiz, S Sánchez-Solano… - 2023 IEEE Nordic …, 2023 - ieeexplore.ieee.org
Hash functions are a crucial part of the cryptographic primitives. So much so that in 2007 a
new competition was launched to select new standards for the SHA-3 function, which was …