This paper presents power analysis of the seven full adder cells [6] reported as having a low
PDP (Power Delay Product), by means of speed, power consumption and area. These full …

The Full Adder circuit is an important component in application such as Digital Signal
Processing (DSP) architecture, microprocessor, and microcontroller and data processing …

The demand increasing for the high fidelity portable devices has laid emphasis on the
development of low power and high performance systems. Binary addition is the most basic …

The main aim of this research is to study and develop new Ultra-Low Voltage and energy-
efficient circuit techniques for low power iOT applications. In the digital domain, NP-domino …

Different logic families have been proposed from several years to improve the performance
of the high speed circuits. Mostly used logic family is CMOS which requires equal number of …

In this paper, design of high speed and area efficient finite field multiplier using factoring
technique for communication is implemented. Data security plays very important role in …

Dynamic domino logic circuits are widely used in modern digital VLSI circuits. These
dynamic circuits are often favored in high performance designs because of the speed …

This paper presents the design and implementation of a low-energy synchronous self timed
logic topology using sense amplifier-based pass transistor logic (SAPTL). The SAPTL …

With the advancement in semiconductor technology, chip density and operating frequency
are increasing, so the power consumption in VLSI circuits has become a major problem of …