Single event transients in digital CMOS—A review

V Ferlet-Cavrois, LW Massengill… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
The creation of soft errors due to the propagation of single event transients (SETs) is a
significant reliability challenge in modern CMOS logic. SET concerns continue to be …

Modeling and simulation of single-event effects in digital devices and ICs

D Munteanu, JL Autran - IEEE Transactions on Nuclear science, 2008 - ieeexplore.ieee.org
This paper reviews the status of research in modeling and simulation of single-event effects
(SEE) in digital devices and integrated circuits, with a special emphasis on the current …

Basic mechanisms and modeling of single-event upset in digital microelectronics

PE Dodd, LW Massengill - IEEE Transactions on nuclear …, 2003 - ieeexplore.ieee.org
Physical mechanisms responsible for nondestructive single-event effects in digital
microelectronics are reviewed, concentrating on silicon MOS devices and integrated circuits …

Charge collection and charge sharing in a 130 nm CMOS technology

OA Amusan, AF Witulski, LW Massengill… - … on nuclear science, 2006 - ieeexplore.ieee.org
Charge sharing between adjacent devices can lead to increased Single Event Upset (SEU)
vulnerability. Key parameters affecting charge sharing are examined, and relative collected …

Soft error rate mitigation techniques for modern microcircuits

DG Mavis, PH Eaton - 2002 IEEE International Reliability …, 2002 - ieeexplore.ieee.org
A unique circuit hardening technique is described, which can totally eliminate both alpha
and neutron induced soft errors from deep submicron microcircuits. This hardening …

Physics of multiple-node charge collection and impacts on single-event characterization and soft error rate prediction

JD Black, PE Dodd, KM Warren - IEEE Transactions on Nuclear …, 2013 - ieeexplore.ieee.org
Physical mechanisms of single-event effects that result in multiple-node charge collection or
charge sharing are reviewed and summarized. A historical overview of observed circuit …

A bias-dependent single-event compact model implemented into BSIM4 and a 90 nm CMOS process design kit

JS Kauppila, AL Sternberg, ML Alles… - … on nuclear Science, 2009 - ieeexplore.ieee.org
A Bias-Dependent Single-Event Compact Model Implemented Into BSIM4 and a 90 nm
CMOS Process Design Kit Page 1 3152 IEEE TRANSACTIONS ON NUCLEAR SCIENCE …

Single-event transient pulse quenching in advanced CMOS logic circuits

JR Ahlbin, LW Massengill, BL Bhuva… - … on Nuclear Science, 2009 - ieeexplore.ieee.org
Heavy-ion broad-beam experiments on a 130 nm CMOS technology have shown
anomalously-short single-event transient pulse widths. 3-D TCAD mixed-mode modeling in …

Single event transient pulse widths in digital microcircuits

MJ Gadlage, RD Schrimpf… - IEEE transactions on …, 2004 - ieeexplore.ieee.org
The radiation effects community has long known that single event transients in digital
microcircuits will have an increasing importance on error rates as device sizes shrink …

On-chip characterization of single-event transient pulsewidths

B Narasimham, V Ramachandran… - … on Device and …, 2006 - ieeexplore.ieee.org
A new on-chip single-event transient (SET) test structure has been developed to
autonomously characterize the widths of random SET pulses. Simulation results show …