P Mukherjee, GP Fang, R Burt… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
Stability analysis is one of the key challenges in analog circuit design. As feature sizes continue to shrink and the effect of parasitics becomes more dominant, we are forced to deal …
A Li, P Li, T Huang… - Design, Automation & …, 2017 - ieeexplore.ieee.org
The continuing scaling of VLSI technology and design complexity has rendered robustness of analog circuits a significant concern. Parasitic effects may introduce unexpected marginal …