Still a fight to get it right: Verification in the era of machine learning

S Vasudevan - 2017 IEEE International Conference on …, 2017 - ieeexplore.ieee.org
We live in interesting times. Our systems have unprecedented levels of device integration.
Analog and mixed signal components and devices form increasingly large parts of our …

Efficient identification of unstable loops in large linear analog integrated circuits

P Mukherjee, GP Fang, R Burt… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
Stability analysis is one of the key challenges in analog circuit design. As feature sizes
continue to shrink and the effect of parasitics becomes more dominant, we are forced to deal …

Noise-sensitive feedback loop identification in linear time-varying analog circuits

A Li, P Li, T Huang… - Design, Automation & …, 2017 - ieeexplore.ieee.org
The continuing scaling of VLSI technology and design complexity has rendered robustness
of analog circuits a significant concern. Parasitic effects may introduce unexpected marginal …