Sherman: A write-optimized distributed b+ tree index on disaggregated memory

Q Wang, Y Lu, J Shu - Proceedings of the 2022 international conference …, 2022 - dl.acm.org
Memory disaggregation architecture physically separates CPU and memory into
independent components, which are connected via high-speed RDMA networks, greatly …

A Survey of Storage Systems in the RDMA era

S Ma, T Ma, K Chen, Y Wu - IEEE Transactions on Parallel and …, 2022 - ieeexplore.ieee.org
Remote Direct Memory Access (RDMA) based network devices are increasingly being
deployed in modern data centers. RDMA brings significant performance improvements over …

Electrode: Accelerating Distributed Protocols with {eBPF}

Y Zhou, Z Wang, S Dharanipragada, M Yu - 20th USENIX Symposium …, 2023 - usenix.org
Implementing distributed protocols under a standard Linux kernel networking stack enjoys
the benefits of load-aware CPU scaling, high compatibility, and robust security and isolation …

RAMBDA: RDMA-driven Acceleration Framework for Memory-intensive µs-scale Datacenter Applications

Y Yuan, J Huang, Y Sun, T Wang… - … Symposium on High …, 2023 - ieeexplore.ieee.org
Responding to the" datacenter tax" and" killer microseconds" problems for memory-intensive
datacenter applications, diverse solutions including Smart NIC-based ones have been …

Unleashing SmartNIC packet processing performance in P4

J Xing, Y Qiu, KF Hsu, S Sui, K Manaa… - Proceedings of the …, 2023 - dl.acm.org
SmartNICs are on the rise as a packet processing platform, with the trend towards a uniform
P4 programming model. However, unleashing SmartNIC packet processing performance in …

Characterizing Off-path {SmartNIC} for Accelerating Distributed Systems

X Wei, R Cheng, Y Yang, R Chen, H Chen - 17th USENIX Symposium …, 2023 - usenix.org
SmartNICs have recently emerged as an appealing device for accelerating distributed
systems. However, there has not been a comprehensive characterization of SmartNICs, and …

{AlNiCo}:{SmartNIC-accelerated} contention-aware request scheduling for transaction processing

J Li, Y Lu, Q Wang, J Lin, Z Yang, J Shu - 2022 USENIX Annual …, 2022 - usenix.org
High-performance transaction processing needs to schedule numerous requests from the
network. However, such request scheduling comes with costs of complex information …

LogNIC: A High-Level Performance Model for SmartNICs

Z Guo, J Lin, Y Bai, D Kim, M Swift, A Akella… - Proceedings of the 56th …, 2023 - dl.acm.org
SmartNICs have become an indispensable communication fabric and computing substrate
in today's data centers and enterprise clusters, providing in-network computing capabilities …

{STYX}: Exploiting {SmartNIC} Capability to Reduce Datacenter Memory Tax

H Ji, M Mansi, Y Sun, Y Yuan, J Huang… - 2023 USENIX Annual …, 2023 - usenix.org
Memory optimization kernel features, such as memory deduplication, are designed to
improve the overall efficiency of systems like datacenter servers, and they have proven to be …

Waverunner: An elegant approach to hardware acceleration of state machine replication

M Alimadadi, H Mai, S Cho, M Ferdman… - … USENIX Symposium on …, 2023 - usenix.org
State machine replication (SMR) is a core mechanism for building highly available and
consistent systems. In this paper, we propose Waverunner, a new approach to accelerate …