Asynchronous NoC with Fault tolerant mechanism: A Comprehensive Review
R Siddagangappa - 2022 Trends in Electrical, Electronics …, 2022 - ieeexplore.ieee.org
The Network on Chip (NoC) is a cost-effective alternative to bus-based connectivity in most
multi-core networks. The NoC system solves the drawbacks of bus-based networks by …
multi-core networks. The NoC system solves the drawbacks of bus-based networks by …
Analytical reliability analysis of 3D NoC under TSV failure
The network-on-chip (NoC) technology allows for integration of a manycore design on a
single chip for higher efficiency and scalability. Three-dimensional (3D) NoCs offer several …
single chip for higher efficiency and scalability. Three-dimensional (3D) NoCs offer several …
Investigation of transient fault effects in synchronous and asynchronous network on chip router
This paper presents comparison of transient fault effects in an asynchronous NoC router and
a synchronous one. The experiment is based on simulation-based fault injection method to …
a synchronous one. The experiment is based on simulation-based fault injection method to …
Partial virtual channel sharing: a generic methodology to enhance resource management and fault tolerance in networks-on-chip
We present a novel Partial Virtual channel Sharing (PVS) NoC architecture which reduces
the impact of faults on performance and also tolerates faults within the routing logic. Without …
the impact of faults on performance and also tolerates faults within the routing logic. Without …
The inverse perspective problem from a single view for polyhedra location
M Dhome, M Richetin, JT Lapresté… - Proceedings CVPR'88 …, 1988 - ieeexplore.ieee.org
A method to find the analytical solutions of the inverse perspective problem for the
determination of the 3-D object attitude in space from a single perspective image is …
determination of the 3-D object attitude in space from a single perspective image is …
How do engineering educators take student difference into account?
B Sattler, J Turns, K Gygi - 2009 39th IEEE Frontiers in …, 2009 - ieeexplore.ieee.org
This paper addresses the extent to which, and the ways in which, engineering educators
take student differences into account when making teaching-related decisions. We have …
take student differences into account when making teaching-related decisions. We have …
A gals router for asynchronous network-on-chip
A scalable asynchronous NoC router with lower power consumption and latency comparing
to a synchronous design is introduced in this article. It employs GALS interfaces …
to a synchronous design is introduced in this article. It employs GALS interfaces …
[PDF][PDF] An efficient asynchronous spatial division multiplexing router for network-on-chip on the hardware platform.
R Siddagangappa, ND Krishnagowda… - International Journal of …, 2023 - core.ac.uk
The quasi-delay-insensitive (QDI) based asynchronous network-on-chip (ANoC) has several
advantages over clock-based synchronous network-onchips (NoCs). The asynchronous …
advantages over clock-based synchronous network-onchips (NoCs). The asynchronous …
A novel topology-independent router architecture to enhance reliability and performance of networks-on-chip
We present the partial virtual-channel sharing (PVS) NoC architecture which reduces the
impact of fault on system performance and can also tolerate the faults on routing logic. A …
impact of fault on system performance and can also tolerate the faults on routing logic. A …
Enhancing performance sustainability of fault tolerant routing algorithms in NoC-based architectures
Reliability of embedded systems and devices is becoming a challenge with technology
scaling. To deal with the reliability issues, fault tolerant solutions are needed. The design …
scaling. To deal with the reliability issues, fault tolerant solutions are needed. The design …