Using BGP to reduce power consumption in core and edge networks: A metric-based approach

Resistive opens in a class of CMOS latches: Analysis and DFT

A Zenteno, VH Champac - Proceedings 19th IEEE VLSI Test …, 2001 - ieeexplore.ieee.org
The behavior of a class of CMOS latches in the presence of resistive opens is investigated.
The detectability of resistive opens by delay testing is analyzed. The resistive opens in the …
被引用次数：7 相关文章 所有 3 个版本

Ant-colony based heuristics to minimize power and delay in the internet

S Raman, G Raina, H Hildmann… - 2013 IEEE International …, 2013 - ieeexplore.ieee.org
In networks like the Internet, it is desirable to reduce both power consumption and delays. In
this paper, we propose an ant-colony heuristic algorithm which aims to minimize the product …
被引用次数：4 相关文章 所有 3 个版本

Using timers to switch-off TCAM banks in routers

S Raman, K Veezhinathan, B Venkat… - 2013 IEEE …, 2013 - ieeexplore.ieee.org
Ternary Content Addressable Memory (TCAM) is the de-facto standard for route lookup in
routers. While TCAMs support fast packet header lookup, they also consume high power. In …
被引用次数：1 相关文章 所有 2 个版本