Performance and thermal tradeoffs for energy-efficient monolithic 3D network-on-chip
Three-dimensional (3D) integration enables the design of high-performance and energy-
efficient network on chip (NoC) architectures as communication backbones for manycore …
efficient network on chip (NoC) architectures as communication backbones for manycore …
Three-dimensional NoC reliability evaluation
Methods, storage mediums, and apparatuses for evaluating the reliability of Three-
Dimensional (3D) Network-on-Chip (NoC) designs are described. The described …
Dimensional (3D) Network-on-Chip (NoC) designs are described. The described …
Capacitive and inductive tsv-to-tsv resilient approaches for 3d ics
PM Yaghini, A Eghbal, SS Yazdi… - IEEE Transactions …, 2015 - ieeexplore.ieee.org
TSV-to-TSV coupling is known to be a significant detriment to signal integrity in three-
dimensional (3D) IC architectures. Designing a reliable Through-Silicon Via is critical in …
dimensional (3D) IC architectures. Designing a reliable Through-Silicon Via is critical in …
[图书][B] Reliability enhancement of many-core processors
M SeyyedHosseini - 2017 - search.proquest.com
Many-core systems are of great importance for building the exascale computing machine
targeted for 2020. Last-Level Cache (LLC), as the largest on-chip shared memory in many …
targeted for 2020. Last-Level Cache (LLC), as the largest on-chip shared memory in many …
Three-Dimensional NoC Reliability Evaluation Automated Tool (TREAT)
A Eghbal - 2016 - escholarship.org
Technology scaling and higher operational frequencies are no longer sustainable at the
same pace as before. The processor industry is rapidly moving from a single core with high …
same pace as before. The processor industry is rapidly moving from a single core with high …
[图书][B] Resilient 3D network-on-chip design and analysis
PM Yaghini - 2016 - search.proquest.com
Like every other major changes in computer architecture, exascale computing, targeted for
2020, requires dramatic and unanticipated shifts in different perspectives. The biggest …
2020, requires dramatic and unanticipated shifts in different perspectives. The biggest …
[PDF][PDF] Exploring Power-Thermal-Performance Trade-Offs in 3D Network on Chip-Enabled Many-Core Systems
D Lee - 2018 - rex.libraries.wsu.edu
1. INTRODUCTION.................................................... 1.1. 3D NoC Design and Thermal
Issue.................................... 1.2. Challenges of TSV-based 3D NoC Design …
Issue.................................... 1.2. Challenges of TSV-based 3D NoC Design …