[PDF][PDF] 具高介電常數氧化鋁與氧化矽堆疊結構金氧半元件多位階電荷儲存及暫態記憶特性之研究
羅雅云， 胡振國 - 2024 - tdr.lib.ntu.edu.tw
摘要本篇論文主要在探討高介電常數材料對金氧半電容元件的基本電特性及記憶體應用中電荷
儲存性能之影響. 有別於傳統平面金氧半穿隧二極體, 我們在氧化矽上堆疊兩層高介電材料氧化 …
儲存性能之影響. 有別於傳統平面金氧半穿隧二極體, 我們在氧化矽上堆疊兩層高介電材料氧化 …
High-k gate dielectric nano-FET leakage current analysis
B Chan, C Soh, KE Siew, HS Kheong… - 2021 IEEE 19th …, 2021 - ieeexplore.ieee.org
This paper reveals the use of high-k dielectric material to mitigate the subthreshold leakage
current. The feature size of conventional MOSFET using SiO2 has approached their physical …
current. The feature size of conventional MOSFET using SiO2 has approached their physical …
Simulation Analysis of High-k Dielectric Junction less FET for Reduction of Subthreshold Leakage Current
A Chaudhary, AK Singh… - … Conference on Device …, 2023 - ieeexplore.ieee.org
With the purpose of reduction of the subthreshold leakage current, high-k dielectric material
is used, as this work demonstrates. The because of high leakage current and a sharp rise in …
is used, as this work demonstrates. The because of high leakage current and a sharp rise in …
[图书][B] Next Generation Dynamically Reconfigurable DSP in 16nm Technology
UY Rathore - 2018 - search.proquest.com
An increasing number of dedicated accelerators in modern System on Chips (SoCs) have
led to large regions of dark silicon. Although highly efficient, these accelerators (ASICs) are …
led to large regions of dark silicon. Although highly efficient, these accelerators (ASICs) are …