Exceeding 400% tunnel magnetoresistance at room temperature in epitaxial Fe/MgO/Fe (001) spin-valve-type magnetic tunnel junctions

T Scheike, Q Xiang, Z Wen, H Sukegawa… - Applied Physics …, 2021 - pubs.aip.org
Giant tunnel magnetoresistance (TMR) ratios of 417% at room temperature (RT) and 914%
at 3 K were demonstrated in epitaxial Fe/MgO/Fe (001) exchange-biased spin-valve …

[HTML][HTML] Enhanced tunnel magnetoresistance in Fe/Mg4Al-Ox/Fe (001) magnetic tunnel junctions

T Scheike, Z Wen, H Sukegawa, S Mitani - Applied Physics Letters, 2022 - pubs.aip.org
Spinel MgAl 2 O 4 and family oxides are emerging barrier materials useful for magnetic
tunnel junctions (MTJs). We report large tunnel magnetoresistance (TMR) ratios up to 429 …

Modeling of breakdown-limited endurance in spin-transfer torque magnetic memory under pulsed cycling regime

R Carboni, S Ambrogio, W Chen… - … on Electron Devices, 2018 - ieeexplore.ieee.org
Perpendicular spin-transfer torque (p-STT) magnetic memory is gaining increasing interest
as a candidate for storage-class memory, embedded memory, and possible replacement of …

A physics-based compact model of stochastic switching in spin-transfer torque magnetic memory

R Carboni, E Vernocchi, M Siddik… - … on Electron Devices, 2019 - ieeexplore.ieee.org
Spin-transfer torque random-access memory (STT-RAM) is gaining momentum as a
promising technology for high-density and embedded nonvolatile memory. Owing to random …

Snra: A spintronic neuromorphic reconfigurable array for in-circuit training and evaluation of deep belief networks

R Zand, RF DeMara - 2018 IEEE International Conference on …, 2018 - ieeexplore.ieee.org
In this paper, a spintronic neuromorphic reconfigurable Array (SNRA) is developed to fuse
together power-efficient probabilistic and in-field programmable deterministic computing …

Proposal of high density two-bits-cell based NAND-like magnetic random access memory

Z Yu, Y Wang, Z Zhang, K He, L Zeng… - … on Circuits and …, 2021 - ieeexplore.ieee.org
In this brief, we propose a Two-bits-cell based NAND-Like MRAM device. The structure is
composed of several stacking cells sharing the same heavy metal and each cell is …

Double-Stack Erasure-Filled Channel and Level-By-Level Error Correction

H UCHIKAWA, M HAGIWARA - IEICE Transactions on Fundamentals …, 2024 - jstage.jst.go.jp
Racetrack memory is a new type of high-capacity memory that stores data in magnetic
nanowires called racetracks. Data is transferred through the nanowires to the access port for …

[图书][B] Energy-Efficient and Secure Designs Of Spintronic Memory: Techniques and Applications

AS Iyengar - 2018 - search.proquest.com
With increased integration of technology in our lives, the arms race between chip
manufacturers to provide the latest and greatest to entice the consumer, only intensifies. A …

[图书][B] Assuring security and privacy of emerging non-volatile memories

MNI Khan - 2019 - search.proquest.com
At the end of Silicon roadmap, keeping the leakage power in tolerable limit has become one
of the biggest challenges. Several promising Non-Volatile Memories (NVMs) such as, Spin …

The Exploitation of the Spin-Transfer Torque Effect for CMOS Compatible Beyond Von Neumann Computing

T Windbacher, A Makarov, S Selberherr… - … Efficient Computing & …, 2019 - taylorfrancis.com
This chapter presents a short introduction into the physics necessary to understand the
spintronic effects, like the magnetoresistance effect, spin-transfer torque, spin Hall effect, and …