3D Network-on-Chip (3D NoC) enables design of high-performance and energy-efficient manycore computing platforms. Two of the commonly used vertical interconnection …
For the first time, this work presents a wireless-wireline hybrid 3D interconnect that employs orthogonal simultaneous bidirectional signaling for 3D Network-on-chip to achieve 2x …
This paper presents a dual-equalization-path (DEP) near field inductive coupling link for contactless vertical interconnect in high-performance 3D IC. The DEP receiver is …
S Gopal, D Heo, T Karnik - 2019 International 3D Systems …, 2019 - ieeexplore.ieee.org
For the first time, this work systematically develops the complete serial link by using hierarchical modeling with serial link power and delay models. This paper presents a …
Recently emerging wearable electronics [21], such as smartwatches, health monitoring straps, wireless earbuds, etc., as well as future low-profile devices like miniature spy robots …
To meet the ever-increasing demands of computational power, multi-core processor integration has risen to new heights. The wireless network-on-chip is an emerging …