Siloz: Leveraging DRAM Isolation Domains to Prevent Inter-VM Rowhammer

K Loughlin, J Rosenblum, S Saroiu, A Wolman… - Proceedings of the 29th …, 2023 - dl.acm.org
Today's cloud DRAM lacks strong isolation primitives, highlighted by Rowhammer bit flips.
Rowhammer poses an increasing threat to cloud security/reliability, given (1) DRAM …

Predicting Future-System Reliability with a Component-Level DRAM Fault Model

J Jung, M Erez - Proceedings of the 56th Annual IEEE/ACM …, 2023 - dl.acm.org
We introduce a new fault model for recent and future DRAM systems that uses empirical
analysis to derive DRAM internal-component level fault models. This modeling level offers …

Data convection: A gpu-driven case study for thermal-aware data placement in 3d drams

S Khadirsharbiyani, J Kotra, K Rao… - Proceedings of the ACM …, 2022 - dl.acm.org
Stacked DRAMs have been studied, evaluated in multiple scenarios, and even productized
in the last decade. The large available bandwidth they offer make them an attractive choice …

SAM: accelerating strided memory accesses

X Xin, Y Guo, Y Zhang, J Yang - MICRO-54: 54th Annual IEEE/ACM …, 2021 - dl.acm.org
Strided memory accesses are an important type of operations for In-Memory Databases
(IMDB) applications. Strided memory accesses often demand data at word granularity with …

A Highly Parallel DRAM Architecture to Mitigate Large Access Latency and Improve Energy Efficiency of Modern DRAM Systems

TA Alawneh, AAM Sharadqh, A Alsharah… - IEEE …, 2024 - ieeexplore.ieee.org
Modern Dynamic Random Access Memory (DRAM) banks are characterized by their ability
to work in parallel, enabling concurrent servicing of multiple memory accesses through the …

High-Performance and Power-Saving Mechanism for Page Activations Based on Full Independent DRAM Sub-Arrays in Multi-Core Systems

TA Alawneh, MM Jarajreh, JS Alkasassbeh… - IEEE …, 2023 - ieeexplore.ieee.org
Modern DRAM devices' performance and energy efficiency are significantly improved when
the row-buffer locality is exploited properly. In multi-core architectures, however, the DRAM …

Processing-in-Memory DRAM Architectures for Neural Network Applications

C Sudarshan - 2024 - kluedo.ub.rptu.de
Emerging applications based on machine learning and Deep Neural Networks (DNNs) are
data-driven and memory-intensive. Hence, there is a recent shift from compute-centric …

A novel DRAM architecture for improved bandwidth utilization and latency reduction using dual-page operation

C Sudarshan, L Steiner, M Jung… - … on Circuits and …, 2021 - ieeexplore.ieee.org
Emerging memory-intensive applications require a paradigm shift from processor-centric to
memory-centric computing. The performance of state-of-the-art computing systems and …

Architecting DDR5 DRAM caches for non-volatile memory systems

X Xin, W Zhu, L Zhao - Proceedings of the 59th ACM/IEEE Design …, 2022 - dl.acm.org
With the release of Intel's Optane DIMM, Non-Volatile Memories (NVMs) are emerging as
viable alternatives to DRAM memories because of the advantage of higher capacity …

[PDF][PDF] Software-defined memory controllers: An idea whose time has come

K Loughlin, S Saroiu, A Wolman… - Wild and Crazy Ideas …, 2022 - kevinloughlin.org
As Dennard scaling/Moore's Law have come to an end, architects and programmers have
had to find creative ways to improve the performance, power, and reliability of their systems …