Low-overhead fault-tolerance technique for a dynamically reconfigurable softcore processor

HM Pham, S Pillement… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
In this paper, we propose a new approach to implement a reliable softcore processor on
SRAM-based FPGAs, which can mitigate radiation-induced temporary faults (single-event …

Voting Margin: A Scheme for Error-Tolerant k Nearest Neighbors Classifiers for Machine Learning

S Liu, P Reviriego, JA Hernández… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Machine learning (ML) techniques such as classifiers are used in many applications, some
of which are related to safety or critical systems. In this case, correct processing is a strict …

Fault tolerant polyphase filters-based decimators for SRAM-based FPGA implementations

Z Gao, J Zhu, TY Tyan, A Ullah… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
To reduce the oversampling rate of baseband signals, decimation is widely used in digital
communication systems. Polyphase filters (PPFs) can be used to efficiently implement …

Toward a fault-tolerant star tracker for small satellite applications

LA Aranda, P Reviriego… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Star trackers are autonomous, high-accuracy electronic systems used to determine the
attitude of a spacecraft. In recent years, commercial-off-the-shelf (COTS)-based star trackers …

[图书][B] Hardware and software fault-tolerance of softcore processors implemented in SRAM-based FPGAs

NH Rollins - 2012 - search.proquest.com
Softcore processors are an attractive alternative to using expensive radiation-hardened
processors for space-based applications. Since they can be implemented in the latest SRAM …

HAFTA: Highly available fault-tolerant architecture to protect SRAM-based reconfigurable devices against multiple bit upsets

Z Ghaderi, SG Miremadi, H Asadi… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
Despite widespread use of SRAM-based reconfigurable devices (SRDs) in mainstream
applications, their usage has been very limited in enterprise and safety–critical applications …

[PDF][PDF] Dynamic partial based single event upset (SEU) injection platform on FPGA

RO Gosheblagh, K Mohammadi - International Journal of Computer …, 2013 - Citeseer
ABSTRACT SRAM based FPGAs are attracting considerable interest especially in
aerospace applications due to their high reconfigurability, low cost and availability …

The flipper fault injection platform: Experiences and knowledge from a ten-year project

M Alderighi, S D'Angelo, F Casini… - ARCS 2017; 30th …, 2017 - ieeexplore.ieee.org
The paper deals with FLIPPER, a fault injection tool for SRAM-based Field Programmable
Gate Array (FPGA) devices developed by the INAF, the Italian National Institute for …

A self-checking approach for SEU/MBUs-hardened FSMs design based on the replication of one-hot code

L Yuanqing, Y Suying, X Jiangtao… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
As technology scales, the protection of Finite State Machines'(FSMs) states against single
event upset (SEU) and multiple bit upsets (MBUs) becomes more difficult. In this paper, a …

Reliability improvement of hardware task graphs via configuration early fetch

R Ramezani, Y Sedaghat… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
This paper presents a technique to improve the reliability and the mean time to failure
(MTTF) of hardware task graphs (TGs) running on reconfigurable computers. This technique …