A sigma-delta modulator

[PDF] researchgate.net

Maximum sequence length MASH digital delta–sigma modulators

K Hosseini, MP Kennedy - … on Circuits and Systems I: Regular …, 2007 - ieeexplore.ieee.org
This paper presents a modified structure for the first-order digital delta-sigma modulator
(DDSM) which yields the maximum sequence length (N) for all constant digital inputs and for …
被引用次数：132 相关文章 所有 6 个版本

[图书][B] Minimizing Spurious Tones in Digital Delta-Sigma Modulators

K Hosseini, MP Kennedy - 2011 - books.google.com
This book describes several Digital Delta-Sigma Modulator (DDSM) architectures, including
multi stage noise shaping (MASH), error feedback modulator (EFM) and single quantizer …
被引用次数：72 相关文章 所有 6 个版本
[PDF] ucc.ie

Architectures for maximum-sequence-length digital delta-sigma modulators

K Hosseini, MP Kennedy - … on Circuits and Systems II: Express …, 2008 - ieeexplore.ieee.org
In this paper, we extend the idea developed in some of our earlier works of using output
feedback to make the quantization step in a digital delta-sigma modulator (DDSM) appear …
被引用次数：34 相关文章 所有 7 个版本

Calculation of cycle lengths in higher order error feedback modulators with constant inputs

B Fitzgibbon, MP Kennedy - … on Circuits and Systems II: Express …, 2011 - ieeexplore.ieee.org
Higher order error feedback modulators are analyzed mathematically to investigate their
periodic behavior. We derive nonlinear equations governing the systems and evaluate the …
被引用次数：13 相关文章 所有 3 个版本

Maximizing Cycle Lengths by Architecture Modification

K Hosseini, MP Kennedy, K Hosseini… - … Spurious Tones in Digital …, 2011 - Springer
In this chapter, we describe deterministic techniques for maximizing the cycle length by
changing the architecture (rather than by setting initial conditions and/or input or by adding …
相关文章 所有 4 个版本

[引用][C] Calculating the Mean and Variance of the Error Signal in Mid-Tread and 1-Bit Quantizers

DS Modulators
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