J Xu, Y Du, Y Tian, C Wang - International Journal of …, 2020 - Taylor & Francis
Wafer bonding is an attractive technology that can join homo/heterogeneous materials into one composite. It has a wide range of applications in the micro-electro-mechanical system …
ZJ Hong, D Liu, HW Hu, CI Cho, MW Weng, JH Liu… - Applied Surface …, 2022 - Elsevier
The bonding mechanism of low-temperature Cusingle bondCu thermal compression bonding (TCB) with passivation layer has been investigated in this research. After the …
F Mu, R He, T Suga - Scripta Materialia, 2018 - Elsevier
Fabrication of GaN-on-diamond structure by bonding technology is becoming more and more attractive for high-power GaN devices. However, researches on low temperature …
ZJ Hong, D Liu, HW Hu, CK Hsiung, CI Cho… - Applied Surface …, 2023 - Elsevier
The novel low-temperature Cu/SiO 2 hybrid bonding scheme using cluster-Ag passivation has been proposed in this study for the heterogeneous integration application. With the …
C Jeon, S Kang, ME Kim, J Park, D Kim… - … Applied Materials & …, 2024 - ACS Publications
Stacking semiconductor chips allows for increased packing density within a given footprint and efficient communication between different functional layers of the chip, leading to higher …
Q Kang, C Wang, S Zhou, G Li, T Lu… - ACS Applied Materials …, 2021 - ACS Publications
Cu/SiO2 hybrid bonding with planarized dielectric and isolated metal connections can realize ultradense interconnects (eg,≤ 1 μm) by eliminating the microbumps and underfill …
H Park, H Seo, SE Kim - Scientific reports, 2020 - nature.com
An anti-oxidant Cu layer was achieved by remote mode N2 plasma. Remote mode plasma treatment offers the advantages of having no defect formation, such as pinholes, by …
J Park, S Kang, ME Kim, NJ Kim, J Kim… - Advanced Materials …, 2023 - Wiley Online Library
Hybrid bonding enables the commercialization of ultra‐fine pitch high‐density 3D packages. Cu/SiO2 hybrid bonding is the standard packing interface recently introduced in the industry …
Three-dimensional (3D) packaging using through-Si-via (TSV) is a key technique for achieving high-density integration, high-speed connectivity, and for downsizing of electronic …