Structural models of finite-state machines for their implementation on programmable logic devices and systems on chip

AS Klimowicz, VV Solov'ev - Journal of Computer and Systems Sciences …, 2015 - Springer
Digital systems based on programmable logic devices and systems on chip often use
register buffers for the transmission of signals between functional units. In this paper …

Intelligent traffic light controller–An FPGA implementation

D Krishnegowda - 2021 5th International Conference on …, 2021 - ieeexplore.ieee.org
With the increase in number of vehicles on roads, management of traffic flow on urban roads
has become a challenging task. Bad traffic management increases the time spent on road …

Balanced State Splitting of Finite State Machines for FPGA Implementations of Control Units

A Klimowicz - … Conference on Computer Information Systems and …, 2024 - Springer
A balanced approach to splitting procedures for finite state machines that are implemented
in field programmable logic arrays is proposed. This method incorporates optimization …

Conversion of mealy to Moore machine for safety critical systems

PS Prasanna, B Rithvej, JVR Ravindra - AIP Conference Proceedings, 2021 - pubs.aip.org
In this document, we will show the process of conversion of an asynchronous feed-backed
Mealy finite state machine into the Moore finite state machine with the help of the pass …

State assignment of direct output synchronous FSMs using genetic algorithm

T Curtinhas, DL Oliveira, O Verducci… - 2017 IEEE XXIV …, 2017 - ieeexplore.ieee.org
Controllers based on Synchronous Finite State Machines (SFSM) are widely used in the
design of digital hardware and that can be implemented in Field Programmable Gate Arrays …

[PDF][PDF] CMCU model with base structure dedicated for CPLD systems

A Barkalov, L Titarenko, L Smoliński - Przegląd Elektroniczny, 2014 - pe.org.pl
The method of hardware reduction presented in this work is intended for the compositional
microprogram control unit (CMCU) implemented in the complex programmable logic device …

[PDF][PDF] NeuralSynth-A Neural Network to FPGA Compilation Framework for Runtime

G Lanham Jr - WORK, 2020 - fau.digital.flvc.org
Artificial neural networks represent a growing area within Machine Learning (ML) that is
inspired by how the brain processes information. The fundamental unit of an artificial neural …

Структури і методи синтезу мікропрограмних автоматів з операційним перетворенням кодів станів

РМ Бабаков - 2021 - openarchive.nure.ua
Анотація У дисертаційній роботі вирішено актуальну наукову проблему розробки,
обґрунтування і дослідження теоретичних основ, структур, моделей і методів …

Структурные модели конечных автоматов при их реализации на программируемых логических интегральных схемах и системах на кристалле

АС Климович, ВВ Соловьев - Известия Российской академии наук …, 2015 - elibrary.ru
В проектах цифровых систем на программируемых логических интегральных схемах и
системах на кристалле при передаче сигналов между функциональными блоками …

Neuralsynth–A Neural Network to FPGA Compilation Framework for Runtime Evaluation

G Lanham Jr - 2020 - search.proquest.com
Artificial neural networks are increasing in power, with attendant increases in demand for
efficient processing. Performance is limited by clock speed and degree of parallelization …