The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems
The design of embedded systems is being challenged by their growing complexity and tight
performance requirements. This paper presents the COMPLEX UML/MARTE Design Space …
performance requirements. This paper presents the COMPLEX UML/MARTE Design Space …
A Model-Driven Platform for Dynamic Partially Reconfigurable Architectures: A Case Study of a Watermarking System
The reconfigurable feature of FPGAs (Field-Programmable Gate Arrays) has made them a
very attractive solution for implementing adaptive systems-on-chip. However, this implies …
very attractive solution for implementing adaptive systems-on-chip. However, this implies …
Graph-grammar-based IP-integration (GRIP)—An EDA tool for software-defined SoCs
M Jassi, Y Hu, D Mueller-Gritschneder… - ACM Transactions on …, 2018 - dl.acm.org
In modern system-on-chip (SoC) designs, IP-reuse is considered a driving force to increase
productivity. To support various designs, a huge amount of Intellectual Property (IP) …
productivity. To support various designs, a huge amount of Intellectual Property (IP) …
A MDD methodology for specification of embedded systems and automatic generation of fast configurable and executable performance models
This paper presents the COMPLEX UML/MARTE modeling methodology and its related
framework for automatic generation of executable performance models. The modeling …
framework for automatic generation of executable performance models. The modeling …
[HTML][HTML] Abeto: An automated benchmarking tool to manage heterogeneous IP core databases
Abstract System-level design makes use of building blocks, known as soft IP cores, to build
complex developments. The usage of these IP cores allows to reduce design and …
complex developments. The usage of these IP cores allows to reduce design and …
Instruction extension of a risc-v processor modeled with ip-xact
S Payvar, E Pekkarinen, R Stahl… - 2019 IEEE Nordic …, 2019 - ieeexplore.ieee.org
Short time-to-market and cost consideration of hardware design promotes reuse of ever
more complex intellectual property even up to processors. In processor design, the …
more complex intellectual property even up to processors. In processor design, the …
System synthesis from UML/MARTE models: The PHARAON approach
H Posadas, P Peñil, A Nicolás… - Proceedings of the 2013 …, 2013 - ieeexplore.ieee.org
Model-Driven Engineering (MDE) based on UML is a mature methodology for software
development. However, its application to HW/SW embedded system specification and …
development. However, its application to HW/SW embedded system specification and …
Automatic generation of s-lam descriptions from uml/marte for the dse of massively parallel embedded systems
Abstract Massively Parallel Multi-Processors System-on-Chip (MP2SoC) architectures
require efficient programming models and tools to deal with the massive parallelism present …
require efficient programming models and tools to deal with the massive parallelism present …
A model-driven methodology for the development of SystemC executable environments
F Herrera, P Peñil, H Posadas… - Proceeding of the 2012 …, 2012 - ieeexplore.ieee.org
System-level design methodologies rely on high-level modeling and analysis techniques.
Model driven development (MDD), component-based design (CBD) and abstraction enable …
Model driven development (MDD), component-based design (CBD) and abstraction enable …
MARTE and IP-XACT based approach for run-time scalable NoC
HL Kidane, EB Bourennane - 2018 IEEE 12th International …, 2018 - ieeexplore.ieee.org
The Networks on chip (NoC) based communication is increasingly used as a solution for
multi-IP system-on-Chip. There have been tremendous works to improve the adaptation of …
multi-IP system-on-Chip. There have been tremendous works to improve the adaptation of …