Design analysis of a 12.5 GHz PLL in 130 nm SiGe BiCMOS process

K Zhu, V Saxena, X Wu… - 2015 IEEE Workshop on …, 2015 - ieeexplore.ieee.org
A systematic design method is applied to study and analyze the loop stability and phase
noise of a type-II 3rd-order charge pump PLL. The designed PLL outputs at 12.5 GHz, which …