K Lundager, B Zeinali, M Tohidi, JK Madsen… - Journal of low power …, 2016 - mdpi.com
With the fast progress in miniaturization of sensors and advances in micromachinery systems, a gate has been opened to the researchers to develop extremely small …
A Asenov, S Saini - IEEE Transactions on Electron Devices, 1999 - ieeexplore.ieee.org
A detailed three-dimensional (3-D) statistical" atomistic" simulation study of fluctuation- resistant sub 0.1-/spl mu/m MOSFET architectures with epitaxial channels and delta doping …
Y Li, CH Hwang, TY Li, MH Han - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
This paper, for the first time, estimates the influences of the intrinsic-parameter fluctuations consisting of metal-gate work-function fluctuation (WKF), process-variation effect (PVE), and …
SE Thompson, DR Thummalapally - US Patent 8,604,530, 2013 - Google Patents
Some structures and methods to reduce power consumption in devices can be implemented largely by reusing existing bulk CMOS process flows and manufacturing technology …
In this paper, the impact of the substrate on the performance of three channels Stacked Nanosheet Field Effect Transistor (SNSH-FET) is studied, and the Super-Steep-Retrograde …
Deeply Depleted Channel (DDC) design, allowing CMOS based devices to have a reduced OV, compared to conven tional bulk CMOS and can allow the threshold voltage V of FETs …
T Hiramoto, M Takamiya - IEICE Transactions on Electronics, 2000 - search.ieice.org
We have studied the characteristic trade-offs in low power and low voltage MOSFETs from the viewpoint of back-gate control and body effect factor. Previously reported MOSFET …
K Fujita, Y Torii, M Hori, J Oh, L Shifren… - 2011 International …, 2011 - ieeexplore.ieee.org
We have achieved aggressive reduction of VT variation and V DD-min by a sophisticated planar bulk MOSFET named 'Deeply Depleted Channel™(DDC)'. The DDC transistor has …