Load balancing in distributed systems: An approach using cooperative games

D Grosu, AT Chronopoulos… - … 16th International Parallel …, 2002 - ieeexplore.ieee.org
In this paper we formulate the static load balancing problem in single class job distributed
systems as a cooperative game among computers. It is shown that the Nash Bargaining …

On rewiring and simplification for canonicity in threshold logic circuits

PY Kuo, CY Wang, CY Huang - 2011 IEEE/ACM International …, 2011 - ieeexplore.ieee.org
Rewiring is a well developed and widely used technique in the synthesis and optimization of
traditional Boolean logic designs. The threshold logic is a new alternative logic …

Rewiring for threshold logic circuit minimization

CC Lin, CY Wang, YC Chen… - 2014 Design, Automation …, 2014 - ieeexplore.ieee.org
Recently, many works have been focused on synthesis, verification, and testing of threshold
circuits due to the rapid development in efficient implementation of threshold logic circuits …

Частично определенные логические системы и алгоритмы

АА Прихожий - 2013 - rep.bntu.by
Исследованы фундаментальные основы построения компьютерных программ и
цифровых устройств в не полностью специфицированных областях. Предложена …

A don't-care-based approach to reducing the multiplicative complexity in logic networks

HL Liu, YT Li, YC Chen… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Reducing the number of AND gates in logic networks benefits the applications in
cryptography, security, and quantum computing. This work proposes a don't-care-based (DC …

Synthesis and verification of cyclic combinational circuits

JH Chen, YC Chen, WC Weng… - 2015 28th IEEE …, 2015 - ieeexplore.ieee.org
Prior works have demonstrated opportunities for achieving more minimized combinational
circuits by introducing combinational loops during the synthesis. However, they achieved …

Are logic synthesis tools robust?

A Puggelli, T Welp, A Kuehlmann… - Proceedings of the 48th …, 2011 - dl.acm.org
A systematic investigation is presented about the robustness of logic synthesis tools to
equivalence-preserving transformations of the input Verilog file. We have developed a …

Logic restructuring using node addition and removal

YC Chen, CY Wang - … on Computer-Aided Design of Integrated …, 2012 - ieeexplore.ieee.org
This paper presents a logic restructuring technique named node addition and removal
(NAR). It works by adding a node into a circuit to replace an existing node and then …

Majority logic circuit minimization using node addition and removal

CC Ko, CC Lin, YC Chen… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Quantum-dot cellular automata (QCA) is considered as a promising emerging technology
due to its low power dissipation and high device density. Since the majority function is the …

Almost every wire is removable: A modeling and solution for removing any circuit wire

X Yang, TK Lam, WC Tang… - 2012 Design, Automation & …, 2012 - ieeexplore.ieee.org
Rewiring is a flexible and useful logic transformation technique through which a target wire
can be removed by adding its alternative logics without changing the circuit functionality. In …