Data-intensive computing operations, such as training neural networks, are essential for
applications in artificial intelligence but are energy intensive. One solution is to develop …

With the aggressive scaling of device technology, the leakage power has become the main
part of power consumption, which seriously reduces the energy recovery efficiency of …

This paper provides low power solutions for Very Large Scale Integration design. The
dynamic power consumption of CMOS circuits is rapidly becoming a major concern in VLSI …

With continuous advancements evolving in the VLSI design arena, the real time chips which
operates on the principle of charge recovery logic realizes substantially lower power …

Background/Objective: In the recent years, the instantaneous power consumption and the
total energy dissipation of a circuit have become very important factors to be considered in …

Abstract The existing Power Analysis Attacks (PAA) resilient adiabatic logic designs exhibit
variations in current peaks, have asymmetric structures and suffer from Non-Adiabatic …

A novel, energy efficient and power analysis robust logic style called the charge balancing
symmetric pre‐resolve adiabatic logic (CBSPAL) is proposed to overcome the susceptibility …

With the increase in transistor integration in Very Large Scale Integration (VLSI) design,
energy efficiency plays a major role as a design parameter. One of the key ideas used in …

The advent and widespread use of portable devices and their large market share have
turned the spotlight on low-power design of such battery-operated systems. Arithmetic unit is …

The novel pre-resolve and Sense Adiabatic Logic (PSAL) is a less complex quasi-adiabatic
logic circuit usable for frequency range from 100 KHz to 500 MHz. It employs a large height …