Process technology-driven performance and energy efficiency improvements have slowed
down as we approach physical design limits. General-purpose manycore architectures …

This article presents a 32-bit floating-point (FP32) programmable accelerator for solving a
wide range of partial differential equations (PDEs) based on numerical integration methods …

Authors' addresses: Anish Krishnakumar, anish. n. krishnakumar@ wisc. edu; Umit Y. Ogras,
uogras@ wisc. edu, University of Wisconsin-Madison, USA; Radu Marculescu, radum …

Optimizing computational power is critical in the age of data-intensive applications and
Artificial Intelligence (AI)/Machine Learning (ML). While facing challenging bottlenecks …

Multi-core processors from different processor design companies such as Intel; AMD
introduces shared cache memory architecture to improve the performance and better …

The irregular nature of memory accesses of graph workloads makes their performance poor
on modern computing platforms. On manycore reconfigurable architectures (MRAs), in …

Multi-core processor with hierarchical multilevel cache helps to reduce memory access time
and also lower down the speed gap between primary memory and processor. Many …

Hardware accelerators have become permanent features in the post-Dennard computing
landscape, displacing conventional processors for a variety of applications. Not only have …

Traditional general-purpose processors emphasize finding parallelism using hardware
control logic, but this logic is energy inefficient and will limit future performance …

For the characteristics of reconfigurable array processor (RAP) with large amount of data
access and obvious space-time, a dynamic selective replication (DSR) mechanism of …