The last line of defense in the cache hierarchy before going to off-chip memory is very critical
in chip multiprocessors (CMPs) from both the performance and power perspectives. We …

This paper presents a new methodology for design and implementation of signal processing
systems on system-on-chip (SoC) platforms. The methodology is centered on the use of …

Modern embedded systems, to accommodate different applications or functionalities over
the same substrate and provide flexibility at the hardware level, are often resource …

The abstraction level for digital designs is rising from Register Transfer Level (RTL) to
algorithmic untimed or transaction-based, followed by an automated high-level synthesis …

Modern embedded systems designers are required to implement efficient multi-functional
applications, over portable platforms under strong energy and resources constraints …

The growing complexity of digital signal processing applications implemented in
programmable logic and embedded processors make a compelling case the use of high …

Dataflow models of computation are capable of providing high-level descriptions for
hardware and software components and systems, facilitating efficient processes for system …

This paper focuses on how to efficiently reduce power consumption in coarse‐grained
reconfigurable designs, to allow their effective adoption in heterogeneous architectures …

The growing complexity of digital signal processing applications make a compelling case
the use of high-level design and synthesis methodologies for the implementation on …

Many embedded video-based systems require a video codec to reduce the bitrate prior to
exchange video information. MPEG High Efficiency Video Coding (HEVC) is the latest, most …