[图书][B] VLSI test principles and architectures: design for testability
This book is a comprehensive guide to new DFT methods that will show the readers how to
design a testable and quality product, drive down test cost, improve product quality and …
design a testable and quality product, drive down test cost, improve product quality and …
RRAM defect modeling and failure analysis based on march test and a novel squeeze-search scheme
CY Chen, HC Shih, CW Wu, CH Lin… - IEEE Transactions …, 2014 - ieeexplore.ieee.org
The Resistive Random Access Memory (RRAM) is a new type of non-volatile memory based
on the resistive memory device. Researchers are currently moving from resistive device …
on the resistive memory device. Researchers are currently moving from resistive device …
[图书][B] Advanced test methods for SRAMs: effective solutions for dynamic fault detection in nanoscaled technologies
Modern electronics depend on nanoscaled technologies that present new challenges in
terms of testing and diagnostics. Memories are particularly prone to defects since they …
terms of testing and diagnostics. Memories are particularly prone to defects since they …
Neighborhood pattern-sensitive fault testing and diagnostics for random-access memories
KL Cheng, MF Tsai, CW Wu - IEEE Transactions on Computer …, 2002 - ieeexplore.ieee.org
The authors present test algorithms for go/no-go and diagnostic test of memories, covering
neighborhood pattern-sensitive faults (NPSFs). The proposed test algorithms are March …
neighborhood pattern-sensitive faults (NPSFs). The proposed test algorithms are March …
Fault modeling and testing of memristor-based spiking neural networks
KW Hou, HH Cheng, C Tung, CW Wu… - 2022 IEEE International …, 2022 - ieeexplore.ieee.org
The resistive random-access memory (RRAM), whose core is composed of memristor cell
arrays, has recently been proposed for implementing the deep neural network (DNN) and …
arrays, has recently been proposed for implementing the deep neural network (DNN) and …
Software-based self-test for small caches in microprocessors
Nowadays, on-line testing is essential for modern microprocessors to detect latent defects
that either escape manufacturing testing or appear during system operation. Small …
that either escape manufacturing testing or appear during system operation. Small …
A built-in self-test and self-diagnosis scheme for embedded SRAM
Embedded memory test and diagnosis is becoming an important issue in system-on-chip
(SOC) development. Direct access of the memory cores from the limited number of I/O pins is …
(SOC) development. Direct access of the memory cores from the limited number of I/O pins is …
Flash memory built-in self-test using march-like algorithms
Flash memories are a type of non-volatile memory based on floating-gate transistors. The
use of commodity and embedded flash memories are growing rapidly as we enter the …
use of commodity and embedded flash memories are growing rapidly as we enter the …
Nahalem-ex cpu architecture
S Kottapalli, J Baxter - 2009 IEEE Hot Chips 21 Symposium …, 2009 - ieeexplore.ieee.org
Nahalem-EX CPU architecture Page 1 Intel Nehalem-EX CPU Architecture Sailesh Kottapalli,
Jeff Baxter NHM-EX Architecture 1 Intel Confidential Page 2 Legal Disclaimer • INFORMATION …
Jeff Baxter NHM-EX Architecture 1 Intel Confidential Page 2 Legal Disclaimer • INFORMATION …
RAMSES-FT: A fault simulator for flash memory testing and diagnostics
In this paper we present a fault simulator for flash memory testing and diagnostics, called
RAMSES-FT. The fault simulator is designed for easy inclusion of new fault models by …
RAMSES-FT. The fault simulator is designed for easy inclusion of new fault models by …