Comparison and statistical analysis of four write stability metrics in bulk CMOS static random access memory cells

H Qiu, T Mizutani, T Saraya… - Japanese Journal of …, 2015 - iopscience.iop.org
The commonly used four metrics for write stability were measured and compared based on
the same set of 2048 (2k) six-transistor (6T) static random access memory (SRAM) cells by …

Bulk FinFETs with body spacers for improving fin height variation

X Wei, H Zhu, Y Zhang, C Zhao - Solid-State Electronics, 2016 - Elsevier
A novel FinFET structure with body spacers in sub fin (BSSF) is proposed to improve the fin
height variation produced in the manufacturing processes. Device simulation results are …

Modeling of MOSFET subthreshold swing mismatch with BSIM4 Model

XE Bee, MMBM Fauzi, PBY Tan - 2016 IEEE International …, 2016 - ieeexplore.ieee.org
In this paper, we propose a methodology to model the MOSFET subthreshold swing, S
mismatch by using BSIM4 model. The 0.18 μm CMOS technology silicon data show two …

[HTML][HTML] Analysis of threshold voltage fluctuations due to short channel and random doping effects

A Jiménez, RC Ambrosio, MJ Jr, D García… - Superficies y …, 2013 - scielo.org.mx
JIMENEZ, A. et al. Analysis of threshold voltage fluctuations due to short channel and
random doping effects. Superf. vacío [online]. 2013, vol. 26, n. 1, pp. 1-3. ISSN 1665-3521 …

Investigation of process-induced performance variability and optimization of the 10 nm technology node Si bulk FinFETs

RH Baek, CY Kang, CW Sohn, DM Kim, P Kirsch - Solid-state electronics, 2014 - Elsevier
Abstract we propose a process and device design strategy for L g= 14 nm Si bulk n/p-
FinFETs based on the effects of process-induced geometry variability on device …

Enhanced electrical characteristics of FinFET by rapid-thermal-and-laser annealing with suitable power

DB Ruan, KS Chang-Liao, YL Li, HT Feng… - Microelectronic …, 2017 - Elsevier
In order to improve electrical characteristics of FinFETs, various annealing treatments for
dopant activation were studied in this work. The treatments including rapid thermal …

Corner mismatch model for fast non-Monte Carlo best and worst cases simulation

PBY Tan, CC Tan, MMBM Fauzi - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
In this paper, we propose a non-Monte Carlo corner mismatch model, that enables circuit
designers to simulate the best-case and the worst-case mismatch variation of their circuit …

Comparison of MOSFET mismatch models with random physical and random model variables

S Patra, R Geiger - 2014 IEEE 57th International Midwest …, 2014 - ieeexplore.ieee.org
A comparison between two established MOSFET mismatch modeling approaches, one
based upon the use of uncorrelated random physical variables and one based upon the use …

[PDF][PDF] Investigation on Fin and Gate Line Edge Roughness Effets for Sub-22 nm Inversion-Mode and Junctionless FinFETs

KM Liu, LS Yang - International Journal of Engineering Trends and …, 2016 - researchgate.net
In this paper we investigated the line edge roughness (LER) effects on the 22-nm and 14-nm
inversion mode (IM) and jounctionless (JL) FinFETs by TCAD simulation. We examined the …

Variability analysis of a hybrid CMOS/RS nanoelectronic calibration circuit

A Heittmann, TG Noll - 2014 IEEE International Symposium on …, 2014 - ieeexplore.ieee.org
In this paper, a novel adaptable reference circuit is proposed which can be used to calibrate
the switching threshold of a read amplifier. The circuit is based on a network of …