[PDF][PDF] 三维片上网络研究综述

张大坤, 黄翠, 宋国治 - 软件学报, 2015 - jos.org.cn
三维片上网络以其更短的全局互连, 更高的封装密度, 更小的体积等诸多优势,
已引起国内外学术界和产业界的高度重视. 对三维片上网络的研究, 将直接影响一个国家未来 …

Performance analysis of optad-noc: a novel optimized routing algorithm and intelligent router for 3d network-on-chip

K Balamurugan, B Subrahmanyeswara Rao… - Wireless Personal …, 2021 - Springer
Abstract Nowadays System-on-Chip (SoC) is an emerging technology in the world of
Integrated Chip manufacturers. In SoC, many IP cores are integrated inside a chip. The …

Survey on three-dimensional network-on-chip

张大坤, 黄翠, 宋国治 - Journal of Software, 2015 - jos.org.cn
三维片上网络以其更短的全局互连, 更高的封装密度, 更小的体积等诸多优势,
已引起国内外学术界和产业界的高度重视. 对三维片上网络的研究, 将直接影响一个国家未来 …

Over Looped 2d Mesh Topology for Network on Chip

AS RajivaLochana, K Arthi - 2019 1st International Conference …, 2019 - ieeexplore.ieee.org
The arrangements of nodes in the network identifies the complexity of the network. To
reduce the complexity, a structural arrangements of nodes has to be taken care. The mesh …

Efficient dynamic router architecture for optimized performance of noc systems

AG Rashmi, US Pavitha - 2018 International Conference on …, 2018 - ieeexplore.ieee.org
On chip interconnects are the integral part of System on Chip (SoC). As the technology
shrinks with size, wire delay increase and became difficult to meet timing. Network on Chip …

[PDF][PDF] 8 A single cycle low latency bypass router based on network on chip

AA Mulajkar, GS Patel - Intelligent Circuits and Systems, 2021 - library.oapen.org
Network on chip (NoC) is a feasible communication architecture [1] which handles issues
like flexibility, reliability and scalability. Consumption of power in NoC architecture is a major …

[引用][C] ENERJİ VERİMLİ KULLANIMA ÖZEL 3D YONGA ÜSTÜ AĞ TASARIMI

A Barzinmehr - 2017 - Fen Bilimleri Enstitüsü