An overview of RF and microwave research in Latin America: Scanning Latin American research on microwaves

JE Rayas-Sánchez… - IEEE Microwave …, 2023 - ieeexplore.ieee.org
We present, in this article, an up-to-date general and brief scan of the main research
activities in RF and microwaves in Latin America. First, we geographically identify the main …

Hybrid signal integrity modeling and analysis of heterogeneous integrated system with neuromorphic Darwin chip

Q Chen, H Ma, D Li, T Tao, S Tan… - … on Signal and …, 2024 - ieeexplore.ieee.org
This article introduces a comprehensive approach for designing and analyzing signal
integrity in heterogeneous integrated systems that incorporate neuromorphic Darwin chips …

Deep Neural Network-Based Surrogate-Assisted Inverse Optimization for High-Speed Interconnects

Q Chen, L Zhang, H Ma, D Li, Y Li… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Deep neural networks (DNNs) have been broadly adopted in efficiently modeling and
optimizing the signal integrity of high-speed interconnects. However, using DNNs could …

Transmitter and receiver equalizers optimization methodologies for high-speed links in industrial computer platforms post-silicon validation

FE Rangel-Patino, JE Rayas-Sánchez… - … IEEE International Test …, 2018 - ieeexplore.ieee.org
As microprocessor design scales to nanometric technology, traditional post-silicon validation
techniques are inappropriate to get a full system functional coverage. Physical complexity …

PCIe Gen5 physical layer equalization tuning by using K-means clustering and Gaussian process regression modeling in industrial post-silicon validation

FE Rangel-Patiño, A Viveros-Wacher… - 2023 IEEE MTT-S …, 2023 - ieeexplore.ieee.org
Peripheral component interconnect express (PCIe) is a high-performance interconnect
architecture widely adopted in the computer industry. The continuously increasing …

Machine learning techniques and space mapping approaches to enhance signal and power integrity in high-speed links and power delivery networks

JE Rayas-Sánchez, FE Rangel-Patiño… - 2020 IEEE 11th Latin …, 2020 - ieeexplore.ieee.org
Enhancing signal integrity (SI) and reliability in modern computer platforms heavily depends
on the post-silicon validation of high-speed input/output (HSIO) links, which implies a …

Direct optimization of a PCI Express link equalization in industrial post-silicon validation

FE Rangel-Patiño, JE Rayas-Sánchez… - 2018 IEEE 19th Latin …, 2018 - ieeexplore.ieee.org
Post-silicon validation is a crucial industrial testing process in modern computer platforms.
Post-silicon validation of high-speed input/output (HSIO) links can be critical for making a …

High-speed links receiver optimization in post-silicon validation exploiting Broyden-based input space mapping

FE Rangel-Patiño, JE Rayas-Sánchez… - 2018 IEEE MTT-S …, 2018 - ieeexplore.ieee.org
One of the major challenges in high-speed input/output (HSIO) links electrical validation is
the physical layer (PHY) tuning process. Equalization techniques are employed to cancel …

System-level measurement-based design optimization by space mapping technology

JE Rayas-Sánchez, JW Bandler - 2022 IEEE/MTT-S …, 2022 - ieeexplore.ieee.org
Space mapping arose from the need to implement fast and accurate design optimization of
microwave structures using full-wave EM simulators. Space mapping optimization later …

Fast jitter tolerance testing for high-speed serial links in post-silicon validation

A Viveros-Wacher, R Baca-Baylón… - IEEE Transactions …, 2021 - ieeexplore.ieee.org
Post-silicon electrical validation of high-speed input/output (HSIO) links is a critical process
for product qualification schedules of high-performance computer platforms under current …