M Bagheri, F Schembari… - … on Circuits and …, 2020 - ieeexplore.ieee.org
A capacitive DAC is an important building block of a charge-redistribution SAR ADC, for its size has a significant impact on performance. For medium-to high-resolution applications …
Y Zheng, Y Zhao, N Zhou, H Wang, D Jiang - Measurement, 2021 - Elsevier
The resolution of the analog-to-digital converter (ADC), ie the minimum voltage that ADC can recognize, is an important indicator of ADC performance. In order to improve the …
JY Um, YJ Kim, EW Song, JY Sim… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
A digital-domain calibration method is proposed for a split-capacitor DAC (split-CDAC) used in a differential-type 11-bit SAR ADC. It calibrates the nonlinearities of SAR ADC due to the …
J Han, W Bae, E Chang, Z Wang… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
LAYout with Gridded Objects (LAYGO), a Python-based layout-generation engine for enhancing the design productivity of custom circuit layouts in advanced CMOS processes, is …
J Fang, S Thirunakkarasu, X Yu… - … on Circuits and …, 2017 - ieeexplore.ieee.org
This paper presents a 5-GS/s 12-way 10-b time-interleaved successive approximation register (SAR) ADC for direct sampling receivers. Proper signal and clock distribution along …
SE Hsieh, CC Hsieh - IEEE Journal of Solid-State Circuits, 2019 - ieeexplore.ieee.org
This paper presents a 13-bit high-resolution two-step analog-to-digital converter (ADC). Successive approximation register (SAR)-ADCs and an incremental sigma-delta modulator …
H Li, M Maddox, MCW Coin, W Buckley… - … Solid-State Circuits …, 2018 - ieeexplore.ieee.org
The SAR ADC is the architecture of choice for high-precision Nyquist ADCs (> 16b) with MS/s speed. To achieve the required linearity performance, precision SAR ADCs require …
Q Zhang, N Ning, J Li, Q Yu, Z Zhang… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
This paper proposes a high area-efficiency 14-bit column-parallel successive approximation register (SAR) analog-to-digital converter (ADC) for array sensors. A novel hybrid capacitor …
J Guerber, H Venkatram, M Gande… - IEEE Journal of Solid …, 2012 - ieeexplore.ieee.org
The design of a ternary successive approximation (TSAR) analog-to-digital converter (ADC) with quantization time information utilization is proposed. The TSAR examines the transient …