A survey on run-time power monitors at the edge

D Zoni, A Galimberti, W Fornaciari - ACM Computing Surveys, 2023 - dl.acm.org
Effectively managing energy and power consumption is crucial to the success of the design
of any computing system, helping mitigate the efficiency obstacles given by the downsizing …

Bespoke processors for applications with ultra-low area and power constraints

H Cherupalli, H Duwe, W Ye, R Kumar… - Proceedings of the 44th …, 2017 - dl.acm.org
A large number of emerging applications such as implantables, wearables, printed
electronics, and IoT have ultra-low area and power constraints. These applications rely on …

Logic synthesis strategy oriented to low power optimization

M Kubica, A Opara, D Kania - Applied Sciences, 2021 - mdpi.com
The article presents a synthesis strategy focused on low power implementations of
combinatorial circuits in an array-type FPGA structure. Logic functions are described by …

Improving Energy Efficiency of CGRAs with Low-Overhead Fine-Grained Power Domains

A Nayak, K Zhang, R Setaluri, A Carsello… - ACM Transactions on …, 2023 - dl.acm.org
To effectively minimize static power for a wide range of applications, power domains for
coarse-grained reconfigurable array (CGRA) architectures need to be more fine-grained …

An overview of low power hardware architecture for edge computing devices

K Sivaprakasam, P Sriramalakshmi, P Singh… - 5G IoT and Edge …, 2022 - Elsevier
With the rise in cutting-edge artificial intelligence technology, 5G networks and the Internet of
Things (IoT), enormous amounts of data are produced at the source and are required to be …

Practical techniques for securing the Internet of Things (IoT) against side channel attacks

HD Tsague, B Twala - Internet of things and big data analytics toward next …, 2018 - Springer
As a global infrastructure with the aim of enabling objects to communicate with each other,
the Internet of Things (IoT) is being widely used and applied to many critical applications …

A low-power low-VDD nonvolatile latch using spin transfer torque MRAM

K Huang, Y Lian - IEEE transactions on nanotechnology, 2013 - ieeexplore.ieee.org
The high leakage power due to the scaling down of the process nodes has been one of the
critical issues in CMOS circuits, especially in the sleep power critical systems. The emerging …

MAPG: Memory access power gating

K Jeong, AB Kahng, S Kang… - … Design, Automation & …, 2012 - ieeexplore.ieee.org
In mobile systems, the problems of short battery life and increased temperature are
exacerbated by wasted leakage power. Leakage power waste can be reduced by power …

Active mode subclock power gating

JN Mistry, J Myers, BM Al-Hashimi… - … Transactions on very …, 2013 - ieeexplore.ieee.org
This paper presents a technique, called subclock power gating, for reducing leakage power
during the active mode in low performance, energy-constrained applications. The proposed …

Low‐cost power gating solution to increase energy efficiency optimising duty cycling in wireless sensor nodes with power‐hungry sensors

M Pinzi, A Pozzebon - IET Wireless Sensor Systems, 2019 - Wiley Online Library
In this study, a solution focusing on energy efficiency of wireless sensor nodes is presented.
Energy dissipation is a key factor affecting the usability of wireless sensor networks (WSNs) …