Performance optimization of VLSI interconnect layout

J Cong, L He, CK Koh, PH Madden - Integration, 1996 - Elsevier
This paper presents a comprehensive survey of existing techniques for interconnect
optimization during the VLSI physical design process, with emphasis on recent studies on …

Steiner tree problems

FK Hwang, DS Richards - Networks, 1992 - Wiley Online Library
We give a survey up to 1989 on the Steiner tree problems which include the four important
cases of euclidean, rectilinear, graphic, phylogenetic and some of their generalizations. We …

[图书][B] Algorithms for VLSI physical design automation

NA Sherwani - 2012 - books.google.com
Algorithms for VLSI Physical Design Automation, Second Edition is a core reference text for
graduate students and CAD professionals. Based on the very successful First Edition, it …

Power minimization in IC design: Principles and applications

M Pedram - ACM Transactions on Design Automation of Electronic …, 1996 - dl.acm.org
Low power has emerged as a principal theme in today's electronics industry. The need for
low power has caused a major paradigm shift in which power dissipation is as important as …

Managing wire delay in large chip-multiprocessor caches

BM Beckmann, DA Wood - 37th International Symposium on …, 2004 - ieeexplore.ieee.org
In response to increasing (relative) wire delay, architects have proposed various
technologies to manage the impact of slow wires on large uniprocessor L2 caches. Block …

Reducing electricity cost through virtual machine placement in high performance computing clouds

K Le, R Bianchini, J Zhang, Y Jaluria, J Meng… - Proceedings of 2011 …, 2011 - dl.acm.org
In this paper, we first study the impact of load placement policies on cooling and maximum
data center temperatures in cloud service providers that operate multiple geographically …

[图书][B] On optimal interconnections for VLSI

AB Kahng, G Robins - 1994 - books.google.com
On Optimal Interconnections for VLSI describes, from a geometric perspective, algorithms for
high-performance, high-density interconnections during the global and detailed routing …

[图书][B] An introduction to VLSI physical design

M Sarrafzadeh, CK Wong - 1996 - dl.acm.org
From the Publisher: This text treats the physical design of very large scale integrated circuits
gradually and systematically. It examines the design problem and the design process with …

[PDF][PDF] Performance-driven interconnect design based on distributed RC delay model

J Cong, KS Leung, D Zhou - … of the 30th International Design Automation …, 1993 - dl.acm.org
In this paper, we study the interconnect design problem under a distributed RC delay model.
We study the impact of technology factors on the interconnect designs and present general …

New algorithms for the rectilinear Steiner tree problem

JM Ho, G Vijayan, CK Wong - IEEE transactions on computer …, 1990 - ieeexplore.ieee.org
An approach to constructing the rectilinear Steiner tree (RST) of a given set of points in the
plane, starting from a minimum spanning tree (MST), is discussed. The main idea in this …