[图书][B] Asynchronous circuit design

CJ Myers - 2001 - books.google.com
With asynchronous circuit design becoming a powerful tool in the development of new
digital systems, circuit designers are expected to have asynchronous design skills and be …

The design and verification of a high-performance low-control-overhead asynchronous differential equation solver

KY Yun, PA Beerel, V Vakilotojar… - IEEE transactions on …, 1998 - ieeexplore.ieee.org
This paper describes the design and verification of a high-performance asynchronous
differential equation solver benchmark circuit. The design has low-control-overhead which …

CTL model checking of time Petri nets using geometric regions

T Yoneda, H Ryuba - IEICE Transactions on Information and …, 1998 - search.ieice.org
Geometric region method is one of the techniques to handle real-time systems which have
potentially infinite state spaces. However, the original geometric region method gives …

Using zone graph method for computing the state space of a time Petri net

G Gardey, OH Roux, OF Roux - Formal Modeling and Analysis of Timed …, 2004 - Springer
Presently, the method to verify quantitative time properties on Time Petri Nets is the use of
observers. The state space is then computed to test the reachability of a given marking. The …

Model checking bounded prioritized time petri nets

B Berthomieu, F Peres, F Vernadat - International Symposium on …, 2007 - Springer
In a companion paper [BPV06], we investigated the expressiveness of Time Petri Nets
extended with Priorities and showed that it is very close to that Timed Automata, in terms of …

State space computation and analysis of time Petri nets

G Gardey, OH Roux, OF Roux - Theory and Practice of Logic …, 2006 - cambridge.org
The theory of Petri Nets provides a general framework to specify the behaviors of real-time
reactive systems and Time Petri Nets were introduced to take also temporal specifications …

Automatic verification of timed circuits

TG Rokicki, CJ Myers - … Verification: 6th International Conference, CAV'94 …, 1994 - Springer
This paper presents a new formalism and a new algorithm for verifying timed circuits. The
formalism, called orbital nets, allows hierarchical verification based on a behavioral …

[图书][B] Computer-aided synthesis and verification of gate-level timed circuits

CJ Myers - 1996 - search.proquest.com
In recent years, there has been a resurgence of interest in the design of asynchronous
circuits due to their ability to eliminate clock skew problems, achieve average case …

[图书][B] Symbolic approximations for verifying real-time systems

H Wong-Toi - 1995 - search.proquest.com
Real-time systems are appearing in more and more applications where their proper
operation is critical, eg transport controllers and medical equipment. However they are …

Verification of timed systems using POSETs

W Belluomini, CJ Myers - … Conference, CAV'98 Vancouver, BC, Canada …, 1998 - Springer
This paper presents a new algorithm for efficiently verifying timed systems. The new
algorithm represents timing information using geometric regions and explores the timed …