A survey of network-on-chip security attacks and countermeasures
With the advances of chip manufacturing technologies, computer architects have been able
to integrate an increasing number of processors and other heterogeneous components on …
to integrate an increasing number of processors and other heterogeneous components on …
A survey of microarchitectural timing attacks and countermeasures on contemporary hardware
Microarchitectural timing channels expose hidden hardware states though timing. We survey
recent attacks that exploit microarchitectural features in shared hardware, especially as they …
recent attacks that exploit microarchitectural features in shared hardware, especially as they …
Survey on architectural attacks: A unified classification and attack model
According to the World Economic Forum, cyberattacks are considered as one of the most
important sources of risk to companies and institutions worldwide. Attacks can target the …
important sources of risk to companies and institutions worldwide. Attacks can target the …
Evaluation approach for efficient countermeasure techniques against denial-of-service attack on MPSoC-based IoT using multi-criteria decision-making
AAJ Al-Hchaimi, NB Sulaiman, MAB Mustafa… - IEEE …, 2022 - ieeexplore.ieee.org
Context: Denial-of-Service Attack countermeasure techniques (DoS A-CTs) evaluation is a
Multi-criteria decision-making (MCDM) problem based on different MPSoCs of IoT platform …
Multi-criteria decision-making (MCDM) problem based on different MPSoCs of IoT platform …
Real-time detection and localization of distributed DoS attacks in NoC-based SoCs
Network-on-chip (NoC) is widely employed by multicore system-on-chip (SoC) architectures
to cater to their communication requirements. Increasing NoC complexity coupled with its …
to cater to their communication requirements. Increasing NoC complexity coupled with its …
SurfNoC: A low latency and provably non-interfering approach to secure networks-on-chip
As multicore processors find increasing adoption in domains such as aerospace and
medical devices where failures have the potential to be catastrophic, strong performance …
medical devices where failures have the potential to be catastrophic, strong performance …
Efficient timing channel protection for on-chip networks
On-chip network is often dynamically shared among applications that are concurrently
running on a chip-multiprocessor (CMP). In general, such shared resources imply that …
running on a chip-multiprocessor (CMP). In general, such shared resources imply that …
Securing network-on-chip using incremental cryptography
Network-on-chip (NoC) has become the standard communication fabric for on-chip
components in modern System-on-chip (SoC) designs. Since NoC has visibility to all …
components in modern System-on-chip (SoC) designs. Since NoC has visibility to all …
Runtime detection of a bandwidth denial attack from a rogue network-on-chip
In this paper, we propose a covert threat model for MPSoCs designed using 3rd party
Network-on-Chips (NoC). We illustrate that a malicious NoC can disrupt the availability of on …
Network-on-Chips (NoC). We illustrate that a malicious NoC can disrupt the availability of on …
Gossip noc--avoiding timing side-channel attacks through traffic management
C Reinbrecht, A Susin, L Bossuet… - 2016 IEEE Computer …, 2016 - ieeexplore.ieee.org
The wide use of Multi-processing systems-on-chip (MPSoCs) in embedded systems and the
trend to increase the integration between devices have turned these systems vulnerable to …
trend to increase the integration between devices have turned these systems vulnerable to …