End-to-end codesign of Hessian-aware quantized neural networks for FPGAs
We develop an end-to-end workflow for the training and implementation of co-designed
neural networks (NNs) for efficient field-programmable gate array (FPGA) hardware. Our …
neural networks (NNs) for efficient field-programmable gate array (FPGA) hardware. Our …
Automated and Holistic Co-design of Neural Networks and ASICs for Enabling In-Pixel Intelligence
Extreme edge-AI systems, such as those in readout ASICs for radiation detection, must
operate under stringent hardware constraints such as micron-level dimensions, sub-milliwatt …
operate under stringent hardware constraints such as micron-level dimensions, sub-milliwatt …
Design and challenges of edge computing ASICs on front-end electronics
In situ or hardware-embedded data processing of raw signals, close to their source, in
radiation detectors is expected to provide dramatic improvements in data quality and …
radiation detectors is expected to provide dramatic improvements in data quality and …
Algorithm-Aware Digital Design for Analog-on-Top Chips: An ASK Demodulator Comparative Study
F Tecce, M Abate, F Del Prete, GA Cirillo… - 2023 IEEE …, 2023 - ieeexplore.ieee.org
Design of application-specific Digital Signal Processing elements is related to the
implementation of an algorithm, initially implemented in software. The time-to-design can be …
implementation of an algorithm, initially implemented in software. The time-to-design can be …
A Smart Readout ASIC with Real-Time Digital Waveform Processing and Machine Learning
Recent work has proposed the integration of machine learning (ML) algorithms within the
frontend ASICs used for charge detection and readout in high-energy and nuclear physics …
frontend ASICs used for charge detection and readout in high-energy and nuclear physics …
Real-Time Feature Extraction for Readout ASICs: Algorithms and On-Chip Implementations
Recent work has proposed the integration of machine learning (ML) algorithms within the
front-end ASICs used for charge detection and readout in high-energy and nuclear physics …
front-end ASICs used for charge detection and readout in high-energy and nuclear physics …
Exploration of Energy Efficient Computing for Data-Intensive Applications
MA Zaman - 2022 - search.proquest.com
The efficiency of Von-Neumann architecture deteriorates due to memory wall problem [2],
attributable to the mismatch of bandwidth as memories are becoming slower than CPU. In …
attributable to the mismatch of bandwidth as memories are becoming slower than CPU. In …