A highly linear SAW-less noise-canceling receiver with shared TIAs architecture

M Javadi, H Miar-Naimi, S Tijani… - … Transactions on Very …, 2021 - ieeexplore.ieee.org
A modified noise/nonlinearity cancellation low-noise transconductance amplifier (LNTA)
based on an inductively degenerated common-source stage is proposed to improve …

A darlington pair transistor based operational amplifier

A Pandey, S Chakraborty, SK Saw… - 2015 Global Conference …, 2015 - ieeexplore.ieee.org
In this paper a new CMOS operational amplifier using a Darlington pair based gain boosted
technique has been enunciated. The proposed Opamp shows high gain as well as high …

A 21nW CMOS operational amplifier for biomedical application

S Tyagi, S Saurav, A Pandey, P Priyadarshini… - Proceedings of the …, 2017 - Springer
In this paper, CMOS operational amplifier using a two stage has been enunciated for low
power device application by using it in subthreshold region. The proposed op-amp shows …

design and verification of analog integrated circuits using free or open source EDA tools

K Shama - 2019 International Conference on …, 2019 - ieeexplore.ieee.org
In this paper, a design methodology for carrying out all the steps involved in a typical analog
design flow, using free or open source electronic design automation [EDA] tools is proposed …

A 0.8-V Fully Differential Amplifier with 80-dB DC Gain and 8-GHz GBW in 22-nm FDSOI CMOS Technology

H Basavaraju, D Borggreve, F Vanselow… - … on Circuits and …, 2023 - ieeexplore.ieee.org
In this work we propose a fully differential amplifier, designed in 22 nm FDSOI (fully depleted
silicon on insulator), with supply voltage of 0.8 V and achieving 8 GHz gain bandwidth …

[PDF][PDF] 4.596 GHz, High Slew Rate, Ultra low Power Cascode Operational Amplifier in 45 nm CMOS for Wireless Communication

R Kundu, A Pandey, D Ghosh, J Singh… - Int. J. Comput. Appl. Eng …, 2014 - Citeseer
In this paper we have proposed a low power, high slew rate, ultra wide band cascode
operational amplifier for wireless communication systems. The proposed circuit is designed …

A high dynamic range stacked ADCs receiver for long wavelength radio astronomy observations

R Mohellebi, H Petit, P Loumeau… - 2014 IEEE 12th …, 2014 - ieeexplore.ieee.org
We introduce the design and simulation results of a stacked ADCs architecture that allows
the implementation of a wideband and high dynamic range radio astronomy receivers. This …

The drivers of the differential communication lines based on radiation-hardened structured array MH2XA010

OV Dvornikov, NN Prokopenko… - 2016 IEEE East …, 2016 - ieeexplore.ieee.org
The design features of the semicustom differential amplifiers (op-amps) and differential
difference operational amplifiers (DDA) with paraphase output ICs, which are implemented …

A new high speed three stage class B output buffer for LCD applications

S Gambhir, A Gupta, A Kumar… - … Conference on Inventive …, 2016 - ieeexplore.ieee.org
In this paper we have proposed a novel buffer amplifier to be used in LCD circuitry. The
circuit is implemented on 0.18 μm CMOS technology. The new high speed buffer shows the …

The design features of the differential and differential difference current amplifiers for the sensor signal conversion with high intrinsic resistance

IV Pakhomov, AE Popov… - … on Control and …, 2017 - ieeexplore.ieee.org
The article considers the design features of the analog converters of the sensor signals of
the little-investigated subclass-the differential and differential difference current amplifiers …